Efficient verification of out-of-order behaviors with relaxed scoreboards

Microarchitectures often relax order constraints to meet performance requirements. However, the design of a module handling out-of-order behaviors is error prone, since order relaxation asks for sophisticated control. Besides, its functional verification is challenging, because the module does not p...

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Bibliographische Detailangaben

Hauptverfasser:	Freitas, L. S., Andrade, G. A. G., dos Santos, L. C. V.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Bipartite graph Computer science Educational institutions Heuristic algorithms Out of order Protocols Runtime
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