SIMD/MIMD Dynamically-Reconfigurable Architecture for High-Performance Embedded Vision Systems
Image and video processing algorithms are becoming more and more sophisticated. An efficient hardware architecture is a requirement in order to address effectively the increasing computational workload. In a context of high performance, low cost and rapid prototyping, a hybrid SIMD/MIMD architecture...
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| creator | Nieto, A. Vilarino, D. L. Brea, V. M. |
| description | Image and video processing algorithms are becoming more and more sophisticated. An efficient hardware architecture is a requirement in order to address effectively the increasing computational workload. In a context of high performance, low cost and rapid prototyping, a hybrid SIMD/MIMD architecture for image processing is proposed in this work. By reusing functional units and including a dynamically reconfigurable datapath, this architecture enables high performance devices for general image processing tasks with high application development productivity when using as part of a System-on-Chip. A 32-bit 128-unit coprocessor was prototyped on a Virtex-6 FPGA and results show a peak performance of 19.6 GOP/s. |
| doi_str_mv | 10.1109/ASAP.2012.8 |
| format | Conference Proceeding |
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| identifier | ISSN: 1063-6862 |
| ispartof | 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors, 2012, p.94-101 |
| issn | 1063-6862 |
| language | eng |
| recordid | cdi_ieee_primary_6341458 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Arrays Coprocessors FPGA hybrid image-processing MIMD Performance evaluation Program processors Registers SIMD SoC System-on-a-chip |
| title | SIMD/MIMD Dynamically-Reconfigurable Architecture for High-Performance Embedded Vision Systems |
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