A real-time temperature-compensated CMOS RF on-chip power detector with high linearity for wireless applications

An on-chip CMOS RF power detector (PD) is described that has internal temperature compensation and the highest reported linearity. The PD generates a DC current that is proportional to the square root of the RF input power by use of a new detection technique that utilizes p-n junction diodes. The generated DC current obtained by subtracting a replicated current produces the real-time temperature compensation. This subtraction method also suppresses the generated-current error caused by the parasitic element, thereby improving the linearity of the PD. The proposed on-chip PD was fabricated in 90-nm CMOS technology and integrated with a power amplifier (PA). The measured input range for a linearity error within ±0.5 dB was 27 dB at 0.824 GHz and 23 dB at 1.98 GHz. The measured results showed that the PD overcomes real-time temperature changes caused by self-heating, which depends on the output power of the PA. The PD consumes 0.3 mW at 0-dBm input power and occupies 0.04 mm 2 , which are small enough for the PA.