Direct GPU/FPGA Communication via PCI Express
Parallel processing has hit mainstream computing in the form of CPUs, GPUs and FPGAs. While explorations proceed with all three platforms individually and with the CPU-GPU pair, little exploration has been performed with the synergy of GPU-FPGA. This is due in part to the cumbersome nature of commun...
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description | Parallel processing has hit mainstream computing in the form of CPUs, GPUs and FPGAs. While explorations proceed with all three platforms individually and with the CPU-GPU pair, little exploration has been performed with the synergy of GPU-FPGA. This is due in part to the cumbersome nature of communication between the two. This paper presents a mechanism for direct GPU-FPGA communication and characterizes its performance in a full hardware implementation. |
doi_str_mv | 10.1109/ICPPW.2012.20 |
format | Conference Proceeding |
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While explorations proceed with all three platforms individually and with the CPU-GPU pair, little exploration has been performed with the synergy of GPU-FPGA. This is due in part to the cumbersome nature of communication between the two. This paper presents a mechanism for direct GPU-FPGA communication and characterizes its performance in a full hardware implementation.</description><subject>Bandwidth</subject><subject>CUDA</subject><subject>Field programmable gate arrays</subject><subject>FPGA</subject><subject>GPU</subject><subject>Graphics processing unit</subject><subject>Hardware</subject><subject>Memory management</subject><subject>nVidia</subject><subject>Operating systems</subject><subject>PCI Express</subject><subject>PCIe</subject><subject>Switches</subject><subject>Verilog</subject><subject>Windows</subject><subject>Xilinx</subject><issn>0190-3918</issn><issn>2332-5690</issn><isbn>9781467325097</isbn><isbn>1467325090</isbn><isbn>9780769547954</isbn><isbn>0769547958</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjM1qwzAQhNU_qEl97KkXv4CSXUmWtMfgJq4hUB8ScgyKLINKnQTbLe3b17QdmPlgBoaxR4Q5ItCiKup6PxeAYoorlpKxYDTlyky-ZomQUvBcE9z8bqi0kSIHMrcsASTgktDes3QY3mCSFSgtJow_xz74MSvr3WJdl8usOHfdxyl6N8bzKfuMLquLKlt9XfowDA_srnXvQ0j_OWPb9WpbvPDNa1kVyw2PBCO3QRFI7y04fQTrtBO5VwKdap0SjQ7kbWiEDg2i8ngkl09927pWW1Jg5Yw9_d3GEMLh0sfO9d8HLaVRRsgfTC9Fmw</recordid><startdate>201209</startdate><enddate>201209</enddate><creator>Bittner, R.</creator><creator>Ruf, E.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201209</creationdate><title>Direct GPU/FPGA Communication via PCI Express</title><author>Bittner, R. ; Ruf, E.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-8e4903cc80a6b08a6a25c421a4fa42d6e9c8ed26ed114c1b9a5a42ffaf6894083</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Bandwidth</topic><topic>CUDA</topic><topic>Field programmable gate arrays</topic><topic>FPGA</topic><topic>GPU</topic><topic>Graphics processing unit</topic><topic>Hardware</topic><topic>Memory management</topic><topic>nVidia</topic><topic>Operating systems</topic><topic>PCI Express</topic><topic>PCIe</topic><topic>Switches</topic><topic>Verilog</topic><topic>Windows</topic><topic>Xilinx</topic><toplevel>online_resources</toplevel><creatorcontrib>Bittner, R.</creatorcontrib><creatorcontrib>Ruf, E.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bittner, R.</au><au>Ruf, E.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Direct GPU/FPGA Communication via PCI Express</atitle><btitle>2012 41st International Conference on Parallel Processing Workshops</btitle><stitle>icppw</stitle><date>2012-09</date><risdate>2012</risdate><spage>135</spage><epage>139</epage><pages>135-139</pages><issn>0190-3918</issn><eissn>2332-5690</eissn><isbn>9781467325097</isbn><isbn>1467325090</isbn><eisbn>9780769547954</eisbn><eisbn>0769547958</eisbn><coden>IEEPAD</coden><abstract>Parallel processing has hit mainstream computing in the form of CPUs, GPUs and FPGAs. While explorations proceed with all three platforms individually and with the CPU-GPU pair, little exploration has been performed with the synergy of GPU-FPGA. This is due in part to the cumbersome nature of communication between the two. This paper presents a mechanism for direct GPU-FPGA communication and characterizes its performance in a full hardware implementation.</abstract><pub>IEEE</pub><doi>10.1109/ICPPW.2012.20</doi><tpages>5</tpages></addata></record> |
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ispartof | 2012 41st International Conference on Parallel Processing Workshops, 2012, p.135-139 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Bandwidth CUDA Field programmable gate arrays FPGA GPU Graphics processing unit Hardware Memory management nVidia Operating systems PCI Express PCIe Switches Verilog Windows Xilinx |
title | Direct GPU/FPGA Communication via PCI Express |
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