Engineering Barrier and Buffer Layers in InGaAs Quantum-Well MOSFETs

Properties of InGaAs buried-channel quantum-well MOSFETs affected by the barrier and buffer layers are analyzed by numerical simulations to assist device engineering and optimization. The interplay between the charge-neutrality level position at the barrier/dielectric interface and conduction band d...

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Veröffentlicht in:	IEEE transactions on electron devices 2012-12, Vol.59 (12), p.3651-3654
Hauptverfasser:	Morassi, L., Verzellesi, G., Han Zhao, Lee, J. C., Veksler, D., Bersuker, G.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Buffer optimization Compound structure devices Cross-disciplinary physics: materials science rheology Dielectrics Electronics Exact sciences and technology HEMTs III-V MOSFETs Indium gallium arsenide Indium phosphide InGaAs interface traps Logic gates Materials science MOSFETs Nanoscale materials and structures: fabrication and characterization Physics Quantum well devices Quantum wells Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transistors
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