The spot-like defect on aluminum oxide passivation layer for crystalline silicon wafer
Defects such as dislocations and grain boundaries generally govern the efficiency of silicon-based solar cells. The use of a proper passivation layer can substantially increase the energy conversion efficiency. In this study, spot-like defects on the aluminum oxide passivation layer were observed. T...
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creator | Teng-Yu Wang Cheng-Chi Liu Chien-Hsiung Hon Chen-Hsun Du Chung-Yuan Kung Jeng-Lang Lue Chi-Chun Li |
description | Defects such as dislocations and grain boundaries generally govern the efficiency of silicon-based solar cells. The use of a proper passivation layer can substantially increase the energy conversion efficiency. In this study, spot-like defects on the aluminum oxide passivation layer were observed. The formation and variation of spot-like defects were found to be affected by the thermal annealing temperature of the passivation surface. The density of spot-like defects was varied from 1.92 × 10 4 /cm 2 to 3.13 × 10 5 /cm 2 at different annealing temperature. Furthermore, the numbers of spot-like defects were affected by the heating and cooling speed. For the purpose of obtaining high minority carrier lifetime and low hillock defect density simultaneously, using a lower heating and cooling speed in thermal annealing process was suggested. In this study, the obtained minority carrier lifetime and density of spot-like defect with an optimized annealing condition were 166 μs and 8.84 × 10 3 /cm 2 , respectively. |
doi_str_mv | 10.1109/PVSC.2012.6317626 |
format | Conference Proceeding |
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The use of a proper passivation layer can substantially increase the energy conversion efficiency. In this study, spot-like defects on the aluminum oxide passivation layer were observed. The formation and variation of spot-like defects were found to be affected by the thermal annealing temperature of the passivation surface. The density of spot-like defects was varied from 1.92 × 10 4 /cm 2 to 3.13 × 10 5 /cm 2 at different annealing temperature. Furthermore, the numbers of spot-like defects were affected by the heating and cooling speed. For the purpose of obtaining high minority carrier lifetime and low hillock defect density simultaneously, using a lower heating and cooling speed in thermal annealing process was suggested. In this study, the obtained minority carrier lifetime and density of spot-like defect with an optimized annealing condition were 166 μs and 8.84 × 10 3 /cm 2 , respectively.</description><identifier>ISSN: 0160-8371</identifier><identifier>ISBN: 1467300640</identifier><identifier>ISBN: 9781467300643</identifier><identifier>EISBN: 9781467300667</identifier><identifier>EISBN: 1467300667</identifier><identifier>EISBN: 1467300659</identifier><identifier>EISBN: 9781467300650</identifier><identifier>DOI: 10.1109/PVSC.2012.6317626</identifier><language>eng</language><publisher>IEEE</publisher><subject>Aluminum oxide ; Annealing ; Atomic layer deposition ; Charge carrier lifetime ; Passivation ; Silicon</subject><ispartof>2012 38th IEEE Photovoltaic Specialists Conference, 2012, p.000317-000320</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6317626$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27923,54918</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6317626$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Teng-Yu Wang</creatorcontrib><creatorcontrib>Cheng-Chi Liu</creatorcontrib><creatorcontrib>Chien-Hsiung Hon</creatorcontrib><creatorcontrib>Chen-Hsun Du</creatorcontrib><creatorcontrib>Chung-Yuan Kung</creatorcontrib><creatorcontrib>Jeng-Lang Lue</creatorcontrib><creatorcontrib>Chi-Chun Li</creatorcontrib><title>The spot-like defect on aluminum oxide passivation layer for crystalline silicon wafer</title><title>2012 38th IEEE Photovoltaic Specialists Conference</title><addtitle>PVSC</addtitle><description>Defects such as dislocations and grain boundaries generally govern the efficiency of silicon-based solar cells. The use of a proper passivation layer can substantially increase the energy conversion efficiency. In this study, spot-like defects on the aluminum oxide passivation layer were observed. The formation and variation of spot-like defects were found to be affected by the thermal annealing temperature of the passivation surface. The density of spot-like defects was varied from 1.92 × 10 4 /cm 2 to 3.13 × 10 5 /cm 2 at different annealing temperature. Furthermore, the numbers of spot-like defects were affected by the heating and cooling speed. For the purpose of obtaining high minority carrier lifetime and low hillock defect density simultaneously, using a lower heating and cooling speed in thermal annealing process was suggested. In this study, the obtained minority carrier lifetime and density of spot-like defect with an optimized annealing condition were 166 μs and 8.84 × 10 3 /cm 2 , respectively.</description><subject>Aluminum oxide</subject><subject>Annealing</subject><subject>Atomic layer deposition</subject><subject>Charge carrier lifetime</subject><subject>Passivation</subject><subject>Silicon</subject><issn>0160-8371</issn><isbn>1467300640</isbn><isbn>9781467300643</isbn><isbn>9781467300667</isbn><isbn>1467300667</isbn><isbn>1467300659</isbn><isbn>9781467300650</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1kF1LwzAYhSMquM39APEmf6DzTdIkzaUUncJAwbLbkTZvMZp-0HRq_70F59Xh8Byei0PIDYMNY2DuXvdv-YYD4xslmFZcnZG10RlLlRYASulzsvwvKVyQBTAFSSY0uyLLGD8AOAjFFmRfvCONfTcmwX8idVhjNdKupTYcG98eG9r9eIe0tzH6Lzv6GQU74UDrbqDVMMXRhuDbWeKDr2b6bWscrsllbUPE9SlXpHh8KPKnZPeyfc7vd4k3MCaqAqyl01BmpkyziqMzGZRgkHPBHEgsBdTIUpM6KVPuMouVNEJaOa-ZFity-6f1iHjoB9_YYTqcLhG_LN9T3w</recordid><startdate>201206</startdate><enddate>201206</enddate><creator>Teng-Yu Wang</creator><creator>Cheng-Chi Liu</creator><creator>Chien-Hsiung Hon</creator><creator>Chen-Hsun Du</creator><creator>Chung-Yuan Kung</creator><creator>Jeng-Lang Lue</creator><creator>Chi-Chun Li</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201206</creationdate><title>The spot-like defect on aluminum oxide passivation layer for crystalline silicon wafer</title><author>Teng-Yu Wang ; Cheng-Chi Liu ; Chien-Hsiung Hon ; Chen-Hsun Du ; Chung-Yuan Kung ; Jeng-Lang Lue ; Chi-Chun Li</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-6c0ef5d70b89b48c2ed980b09e2231d05eb30fe1494d5542d8aec5935a548c173</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Aluminum oxide</topic><topic>Annealing</topic><topic>Atomic layer deposition</topic><topic>Charge carrier lifetime</topic><topic>Passivation</topic><topic>Silicon</topic><toplevel>online_resources</toplevel><creatorcontrib>Teng-Yu Wang</creatorcontrib><creatorcontrib>Cheng-Chi Liu</creatorcontrib><creatorcontrib>Chien-Hsiung Hon</creatorcontrib><creatorcontrib>Chen-Hsun Du</creatorcontrib><creatorcontrib>Chung-Yuan Kung</creatorcontrib><creatorcontrib>Jeng-Lang Lue</creatorcontrib><creatorcontrib>Chi-Chun Li</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Teng-Yu Wang</au><au>Cheng-Chi Liu</au><au>Chien-Hsiung Hon</au><au>Chen-Hsun Du</au><au>Chung-Yuan Kung</au><au>Jeng-Lang Lue</au><au>Chi-Chun Li</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>The spot-like defect on aluminum oxide passivation layer for crystalline silicon wafer</atitle><btitle>2012 38th IEEE Photovoltaic Specialists Conference</btitle><stitle>PVSC</stitle><date>2012-06</date><risdate>2012</risdate><spage>000317</spage><epage>000320</epage><pages>000317-000320</pages><issn>0160-8371</issn><isbn>1467300640</isbn><isbn>9781467300643</isbn><eisbn>9781467300667</eisbn><eisbn>1467300667</eisbn><eisbn>1467300659</eisbn><eisbn>9781467300650</eisbn><abstract>Defects such as dislocations and grain boundaries generally govern the efficiency of silicon-based solar cells. The use of a proper passivation layer can substantially increase the energy conversion efficiency. In this study, spot-like defects on the aluminum oxide passivation layer were observed. The formation and variation of spot-like defects were found to be affected by the thermal annealing temperature of the passivation surface. The density of spot-like defects was varied from 1.92 × 10 4 /cm 2 to 3.13 × 10 5 /cm 2 at different annealing temperature. Furthermore, the numbers of spot-like defects were affected by the heating and cooling speed. For the purpose of obtaining high minority carrier lifetime and low hillock defect density simultaneously, using a lower heating and cooling speed in thermal annealing process was suggested. In this study, the obtained minority carrier lifetime and density of spot-like defect with an optimized annealing condition were 166 μs and 8.84 × 10 3 /cm 2 , respectively.</abstract><pub>IEEE</pub><doi>10.1109/PVSC.2012.6317626</doi><tpages>4</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Aluminum oxide Annealing Atomic layer deposition Charge carrier lifetime Passivation Silicon |
title | The spot-like defect on aluminum oxide passivation layer for crystalline silicon wafer |
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