Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability

Performance is one of the most important targets in MPSoC design, and it is affected by a lot of factors, such as area, yield, application, and lifetime. Based on the performance, yield and lifetime reliability modeling and analysis of MPSoC, this work proposes a metric directing how to choose the g...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Yueming Yang, Zewen Shi, Jianming Yu, Liulin Zhong, Xiaoyang Zeng, Zhiyi Yu
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 2716
container_issue
container_start_page 2713
container_title
container_volume
creator Yueming Yang
Zewen Shi
Jianming Yu
Liulin Zhong
Xiaoyang Zeng
Zhiyi Yu
description Performance is one of the most important targets in MPSoC design, and it is affected by a lot of factors, such as area, yield, application, and lifetime. Based on the performance, yield and lifetime reliability modeling and analysis of MPSoC, this work proposes a metric directing how to choose the granularity of MPSoC at high level design in order to obtain high performance when yield and lifetime reliability are considered. The results show that, with the given area (300mm 2 ) and certain applications, the optimal performance is obtained at 3×3 mesh, and optimal design becomes 4×4 mesh when yield is considered, and it will prefer 5×5 mesh or 6×6 mesh when lifetime reliability is further considered.
doi_str_mv 10.1109/ISCAS.2012.6271868
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6271868</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6271868</ieee_id><sourcerecordid>6271868</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-48734033bd864b4a7d0a24f135419a34ebbbad181d8ef00dd10abb2e0107c4463</originalsourceid><addsrcrecordid>eNo1kM1uwjAQhN0_qUB5gfbiFwjdtZ3EOSIELRJSD7RnZMcb6iokyA5UefumKj3NjEbzHYaxR4QZIhTP6-1ivp0JQDHLRI4601dsjCrLJQgs9DUbCUx1gqlIb9i0yPV_p-GWjWCYJGqI92wc4xeAAMjEiMXl2dQn0_lmz48UqjYcTFMSbys-mL5sA_FjaEuKsQ2Rf_vuk59N8O0p8n0wzakeQucp8rJtoncUfkm9p9px0zhe-4o6fyAeqPbG-tp3_QO7q0wdaXrRCftYLd8Xr8nm7WW9mG8Sj3naJUrnUoGU1ulMWWVyB0aoCmWqsDBSkbXWONToNFUAziEYawUBQl4qlckJe_rjeiLaHYM_mNDvLufJH_EnYko</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Yueming Yang ; Zewen Shi ; Jianming Yu ; Liulin Zhong ; Xiaoyang Zeng ; Zhiyi Yu</creator><creatorcontrib>Yueming Yang ; Zewen Shi ; Jianming Yu ; Liulin Zhong ; Xiaoyang Zeng ; Zhiyi Yu</creatorcontrib><description>Performance is one of the most important targets in MPSoC design, and it is affected by a lot of factors, such as area, yield, application, and lifetime. Based on the performance, yield and lifetime reliability modeling and analysis of MPSoC, this work proposes a metric directing how to choose the granularity of MPSoC at high level design in order to obtain high performance when yield and lifetime reliability are considered. The results show that, with the given area (300mm 2 ) and certain applications, the optimal performance is obtained at 3×3 mesh, and optimal design becomes 4×4 mesh when yield is considered, and it will prefer 5×5 mesh or 6×6 mesh when lifetime reliability is further considered.</description><identifier>ISSN: 0271-4302</identifier><identifier>ISBN: 9781467302180</identifier><identifier>ISBN: 146730218X</identifier><identifier>EISSN: 2158-1525</identifier><identifier>EISBN: 1467302198</identifier><identifier>EISBN: 9781467302173</identifier><identifier>EISBN: 9781467302197</identifier><identifier>EISBN: 1467302171</identifier><identifier>DOI: 10.1109/ISCAS.2012.6271868</identifier><language>eng</language><publisher>IEEE</publisher><subject>Integrated circuit reliability ; Measurement ; Program processors ; Redundancy ; Reliability engineering ; Tiles</subject><ispartof>2012 IEEE International Symposium on Circuits and Systems (ISCAS), 2012, p.2713-2716</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6271868$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6271868$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yueming Yang</creatorcontrib><creatorcontrib>Zewen Shi</creatorcontrib><creatorcontrib>Jianming Yu</creatorcontrib><creatorcontrib>Liulin Zhong</creatorcontrib><creatorcontrib>Xiaoyang Zeng</creatorcontrib><creatorcontrib>Zhiyi Yu</creatorcontrib><title>Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability</title><title>2012 IEEE International Symposium on Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>Performance is one of the most important targets in MPSoC design, and it is affected by a lot of factors, such as area, yield, application, and lifetime. Based on the performance, yield and lifetime reliability modeling and analysis of MPSoC, this work proposes a metric directing how to choose the granularity of MPSoC at high level design in order to obtain high performance when yield and lifetime reliability are considered. The results show that, with the given area (300mm 2 ) and certain applications, the optimal performance is obtained at 3×3 mesh, and optimal design becomes 4×4 mesh when yield is considered, and it will prefer 5×5 mesh or 6×6 mesh when lifetime reliability is further considered.</description><subject>Integrated circuit reliability</subject><subject>Measurement</subject><subject>Program processors</subject><subject>Redundancy</subject><subject>Reliability engineering</subject><subject>Tiles</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>9781467302180</isbn><isbn>146730218X</isbn><isbn>1467302198</isbn><isbn>9781467302173</isbn><isbn>9781467302197</isbn><isbn>1467302171</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1kM1uwjAQhN0_qUB5gfbiFwjdtZ3EOSIELRJSD7RnZMcb6iokyA5UefumKj3NjEbzHYaxR4QZIhTP6-1ivp0JQDHLRI4601dsjCrLJQgs9DUbCUx1gqlIb9i0yPV_p-GWjWCYJGqI92wc4xeAAMjEiMXl2dQn0_lmz48UqjYcTFMSbys-mL5sA_FjaEuKsQ2Rf_vuk59N8O0p8n0wzakeQucp8rJtoncUfkm9p9px0zhe-4o6fyAeqPbG-tp3_QO7q0wdaXrRCftYLd8Xr8nm7WW9mG8Sj3naJUrnUoGU1ulMWWVyB0aoCmWqsDBSkbXWONToNFUAziEYawUBQl4qlckJe_rjeiLaHYM_mNDvLufJH_EnYko</recordid><startdate>201205</startdate><enddate>201205</enddate><creator>Yueming Yang</creator><creator>Zewen Shi</creator><creator>Jianming Yu</creator><creator>Liulin Zhong</creator><creator>Xiaoyang Zeng</creator><creator>Zhiyi Yu</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201205</creationdate><title>Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability</title><author>Yueming Yang ; Zewen Shi ; Jianming Yu ; Liulin Zhong ; Xiaoyang Zeng ; Zhiyi Yu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-48734033bd864b4a7d0a24f135419a34ebbbad181d8ef00dd10abb2e0107c4463</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Integrated circuit reliability</topic><topic>Measurement</topic><topic>Program processors</topic><topic>Redundancy</topic><topic>Reliability engineering</topic><topic>Tiles</topic><toplevel>online_resources</toplevel><creatorcontrib>Yueming Yang</creatorcontrib><creatorcontrib>Zewen Shi</creatorcontrib><creatorcontrib>Jianming Yu</creatorcontrib><creatorcontrib>Liulin Zhong</creatorcontrib><creatorcontrib>Xiaoyang Zeng</creatorcontrib><creatorcontrib>Zhiyi Yu</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yueming Yang</au><au>Zewen Shi</au><au>Jianming Yu</au><au>Liulin Zhong</au><au>Xiaoyang Zeng</au><au>Zhiyi Yu</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability</atitle><btitle>2012 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2012-05</date><risdate>2012</risdate><spage>2713</spage><epage>2716</epage><pages>2713-2716</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>9781467302180</isbn><isbn>146730218X</isbn><eisbn>1467302198</eisbn><eisbn>9781467302173</eisbn><eisbn>9781467302197</eisbn><eisbn>1467302171</eisbn><abstract>Performance is one of the most important targets in MPSoC design, and it is affected by a lot of factors, such as area, yield, application, and lifetime. Based on the performance, yield and lifetime reliability modeling and analysis of MPSoC, this work proposes a metric directing how to choose the granularity of MPSoC at high level design in order to obtain high performance when yield and lifetime reliability are considered. The results show that, with the given area (300mm 2 ) and certain applications, the optimal performance is obtained at 3×3 mesh, and optimal design becomes 4×4 mesh when yield is considered, and it will prefer 5×5 mesh or 6×6 mesh when lifetime reliability is further considered.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2012.6271868</doi><tpages>4</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0271-4302
ispartof 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 2012, p.2713-2716
issn 0271-4302
2158-1525
language eng
recordid cdi_ieee_primary_6271868
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Integrated circuit reliability
Measurement
Program processors
Redundancy
Reliability engineering
Tiles
title Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T18%3A31%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Evaluating%20performance%20of%20manycore%20processors%20with%20various%20granularities%20considering%20yield%20and%20lifetime%20reliability&rft.btitle=2012%20IEEE%20International%20Symposium%20on%20Circuits%20and%20Systems%20(ISCAS)&rft.au=Yueming%20Yang&rft.date=2012-05&rft.spage=2713&rft.epage=2716&rft.pages=2713-2716&rft.issn=0271-4302&rft.eissn=2158-1525&rft.isbn=9781467302180&rft.isbn_list=146730218X&rft_id=info:doi/10.1109/ISCAS.2012.6271868&rft_dat=%3Cieee_6IE%3E6271868%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1467302198&rft.eisbn_list=9781467302173&rft.eisbn_list=9781467302197&rft.eisbn_list=1467302171&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6271868&rfr_iscdi=true