A Low Power Asynchronous GPS Baseband Processor
We present the design and implementation of an asynchronous Global Positioning System (GPS) base band processor architecture designed with a combination of Quasi-Delay-Insensitive (QDI) and bundled-data techniques, with a focus on minimizing power consumption. All subsystems run at their natural fre...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 40 |
|---|---|
| container_issue | |
| container_start_page | 33 |
| container_title | |
| container_volume | |
| creator | Tang, B. Z. Longfield, Stephen Bhave, S. A. Manohar, R. |
| description | We present the design and implementation of an asynchronous Global Positioning System (GPS) base band processor architecture designed with a combination of Quasi-Delay-Insensitive (QDI) and bundled-data techniques, with a focus on minimizing power consumption. All subsystems run at their natural frequency without clocking and all signal processing is done on-the-fly. Transistor-level simulations show that our system consumes only 1.4mW with position 3-D rms error below 4 meters, comparing favorably to other contemporary GPS base band processors. |
| doi_str_mv | 10.1109/ASYNC.2012.20 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6243879</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6243879</ieee_id><sourcerecordid>6243879</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-886d5cd091c412cf4afdd623c28ada63e1fb44f1825310244cc184f41b6790fd3</originalsourceid><addsrcrecordid>eNotjLtOwzAUQI0AiVIyMrH4B9L6-nk9hooWpAgiFQamyvFDBEGMYlDVv6cSnOGc7RByDWwBwOyy2b4-rhacAT_qhFTWIDPaKqkR7Sm5BKmNAKEZPyMzUJzXqBEuSFXKOztiEJhSM7JsaJv3tMv7ONGmHEb_NuUx_xS66bb01pXYuzHQbso-lpKnK3Ke3EeJ1X_n5GV997y6r9unzcOqaesBjPquEXVQPjALXgL3SboUgubCc3TBaREh9VImQK4EMC6l94AySei1sSwFMSc3f98hxrj7moZPNx12mkuBxopf3f9EZA</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A Low Power Asynchronous GPS Baseband Processor</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Tang, B. Z. ; Longfield, Stephen ; Bhave, S. A. ; Manohar, R.</creator><creatorcontrib>Tang, B. Z. ; Longfield, Stephen ; Bhave, S. A. ; Manohar, R.</creatorcontrib><description>We present the design and implementation of an asynchronous Global Positioning System (GPS) base band processor architecture designed with a combination of Quasi-Delay-Insensitive (QDI) and bundled-data techniques, with a focus on minimizing power consumption. All subsystems run at their natural frequency without clocking and all signal processing is done on-the-fly. Transistor-level simulations show that our system consumes only 1.4mW with position 3-D rms error below 4 meters, comparing favorably to other contemporary GPS base band processors.</description><identifier>ISSN: 1522-8681</identifier><identifier>ISBN: 1467313602</identifier><identifier>ISBN: 9781467313605</identifier><identifier>EISBN: 9780769546889</identifier><identifier>EISBN: 0769546889</identifier><identifier>DOI: 10.1109/ASYNC.2012.20</identifier><language>eng</language><publisher>IEEE</publisher><subject>Asynchronous circuits ; Bundled-Data ; GPS ; Low-Power Receiver ; QDI</subject><ispartof>2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems, 2012, p.33-40</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6243879$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6243879$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Tang, B. Z.</creatorcontrib><creatorcontrib>Longfield, Stephen</creatorcontrib><creatorcontrib>Bhave, S. A.</creatorcontrib><creatorcontrib>Manohar, R.</creatorcontrib><title>A Low Power Asynchronous GPS Baseband Processor</title><title>2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems</title><addtitle>async</addtitle><description>We present the design and implementation of an asynchronous Global Positioning System (GPS) base band processor architecture designed with a combination of Quasi-Delay-Insensitive (QDI) and bundled-data techniques, with a focus on minimizing power consumption. All subsystems run at their natural frequency without clocking and all signal processing is done on-the-fly. Transistor-level simulations show that our system consumes only 1.4mW with position 3-D rms error below 4 meters, comparing favorably to other contemporary GPS base band processors.</description><subject>Asynchronous circuits</subject><subject>Bundled-Data</subject><subject>GPS</subject><subject>Low-Power Receiver</subject><subject>QDI</subject><issn>1522-8681</issn><isbn>1467313602</isbn><isbn>9781467313605</isbn><isbn>9780769546889</isbn><isbn>0769546889</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjLtOwzAUQI0AiVIyMrH4B9L6-nk9hooWpAgiFQamyvFDBEGMYlDVv6cSnOGc7RByDWwBwOyy2b4-rhacAT_qhFTWIDPaKqkR7Sm5BKmNAKEZPyMzUJzXqBEuSFXKOztiEJhSM7JsaJv3tMv7ONGmHEb_NuUx_xS66bb01pXYuzHQbso-lpKnK3Ke3EeJ1X_n5GV997y6r9unzcOqaesBjPquEXVQPjALXgL3SboUgubCc3TBaREh9VImQK4EMC6l94AySei1sSwFMSc3f98hxrj7moZPNx12mkuBxopf3f9EZA</recordid><startdate>201205</startdate><enddate>201205</enddate><creator>Tang, B. Z.</creator><creator>Longfield, Stephen</creator><creator>Bhave, S. A.</creator><creator>Manohar, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201205</creationdate><title>A Low Power Asynchronous GPS Baseband Processor</title><author>Tang, B. Z. ; Longfield, Stephen ; Bhave, S. A. ; Manohar, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-886d5cd091c412cf4afdd623c28ada63e1fb44f1825310244cc184f41b6790fd3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Asynchronous circuits</topic><topic>Bundled-Data</topic><topic>GPS</topic><topic>Low-Power Receiver</topic><topic>QDI</topic><toplevel>online_resources</toplevel><creatorcontrib>Tang, B. Z.</creatorcontrib><creatorcontrib>Longfield, Stephen</creatorcontrib><creatorcontrib>Bhave, S. A.</creatorcontrib><creatorcontrib>Manohar, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tang, B. Z.</au><au>Longfield, Stephen</au><au>Bhave, S. A.</au><au>Manohar, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A Low Power Asynchronous GPS Baseband Processor</atitle><btitle>2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems</btitle><stitle>async</stitle><date>2012-05</date><risdate>2012</risdate><spage>33</spage><epage>40</epage><pages>33-40</pages><issn>1522-8681</issn><isbn>1467313602</isbn><isbn>9781467313605</isbn><eisbn>9780769546889</eisbn><eisbn>0769546889</eisbn><abstract>We present the design and implementation of an asynchronous Global Positioning System (GPS) base band processor architecture designed with a combination of Quasi-Delay-Insensitive (QDI) and bundled-data techniques, with a focus on minimizing power consumption. All subsystems run at their natural frequency without clocking and all signal processing is done on-the-fly. Transistor-level simulations show that our system consumes only 1.4mW with position 3-D rms error below 4 meters, comparing favorably to other contemporary GPS base band processors.</abstract><pub>IEEE</pub><doi>10.1109/ASYNC.2012.20</doi><tpages>8</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1522-8681 |
| ispartof | 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems, 2012, p.33-40 |
| issn | 1522-8681 |
| language | eng |
| recordid | cdi_ieee_primary_6243879 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Asynchronous circuits Bundled-Data GPS Low-Power Receiver QDI |
| title | A Low Power Asynchronous GPS Baseband Processor |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T12%3A40%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20Low%20Power%20Asynchronous%20GPS%20Baseband%20Processor&rft.btitle=2012%20IEEE%2018th%20International%20Symposium%20on%20Asynchronous%20Circuits%20and%20Systems&rft.au=Tang,%20B.%20Z.&rft.date=2012-05&rft.spage=33&rft.epage=40&rft.pages=33-40&rft.issn=1522-8681&rft.isbn=1467313602&rft.isbn_list=9781467313605&rft_id=info:doi/10.1109/ASYNC.2012.20&rft_dat=%3Cieee_6IE%3E6243879%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9780769546889&rft.eisbn_list=0769546889&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6243879&rfr_iscdi=true |