Resource efficiency and equity in chip Multithreading architecture
For Chip Multithreading (CMT) architecture, the inter-thread competition for resources has some uncontrollable and unwanted impacts on both any designated thread and the overall performance. A crucial reason lies in the absence of all-sided approaches to evaluate, predict and further control thread...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 937 |
---|---|
container_issue | |
container_start_page | 932 |
container_title | |
container_volume | |
creator | Hua Yang Caiping Zheng Xiangbin Shi Zhuojin Pan |
description | For Chip Multithreading (CMT) architecture, the inter-thread competition for resources has some uncontrollable and unwanted impacts on both any designated thread and the overall performance. A crucial reason lies in the absence of all-sided approaches to evaluate, predict and further control thread performance and resource utilization. In this paper, we take Rename-Register-File (RRF), a representative storage resource that is critical in regulating resource allocation and therein thread performance, for instance to study the efficiency and equity of resource allocation. For in-depth comparison, we devise two ideal allocation strategies, i.e. Maximizing Performance (MP) and Maximizing Fairness (MF). Then we propose three complementary metrics called Relative Fairness (RF), Efficiency Index (EI), and Effective Utilization (EU), respectively, and carry out a series of evaluations on MP, MF and various classical strategies. The results show that these metrics are objective and instructive, and thus meaningful for further improving thread scheduling and resource allocation. |
doi_str_mv | 10.1109/ICSAI.2012.6223162 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6223162</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6223162</ieee_id><sourcerecordid>6223162</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-ef27de66ccaf705373f0db883aab3d03ffe4167e0c9dd9017eaeb8dda43d02b63</originalsourceid><addsrcrecordid>eNpVj8tKAzEYhSMiKHVeQDd5gRn_XJrLsg5eBiqCdl8yyR8bqWPNZBZ9ewfsxrM5nO_AgUPIDYOGMbB3Xfu-6hoOjDeKc8EUPyOV1YZJpQUwa_n5v2yWl6Qax0-YpbWRUl6R-zccv6fskWKMyScc_JG6IVD8mVI50jRQv0sH-jLtSyq7jC6k4YO6PNOCvkwZr8lFdPsRq5MvyObxYdM-1-vXp65dretkodQYuQ6olPcualgKLSKE3hjhXC8CiBhRMqURvA3BAtPosDchODm3vFdiQW7_ZhMibg85fbl83J6Oi1_H9k2T</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Resource efficiency and equity in chip Multithreading architecture</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Hua Yang ; Caiping Zheng ; Xiangbin Shi ; Zhuojin Pan</creator><creatorcontrib>Hua Yang ; Caiping Zheng ; Xiangbin Shi ; Zhuojin Pan</creatorcontrib><description>For Chip Multithreading (CMT) architecture, the inter-thread competition for resources has some uncontrollable and unwanted impacts on both any designated thread and the overall performance. A crucial reason lies in the absence of all-sided approaches to evaluate, predict and further control thread performance and resource utilization. In this paper, we take Rename-Register-File (RRF), a representative storage resource that is critical in regulating resource allocation and therein thread performance, for instance to study the efficiency and equity of resource allocation. For in-depth comparison, we devise two ideal allocation strategies, i.e. Maximizing Performance (MP) and Maximizing Fairness (MF). Then we propose three complementary metrics called Relative Fairness (RF), Efficiency Index (EI), and Effective Utilization (EU), respectively, and carry out a series of evaluations on MP, MF and various classical strategies. The results show that these metrics are objective and instructive, and thus meaningful for further improving thread scheduling and resource allocation.</description><identifier>ISBN: 9781467301985</identifier><identifier>ISBN: 1467301981</identifier><identifier>EISBN: 9781467301992</identifier><identifier>EISBN: 9781467301978</identifier><identifier>EISBN: 1467301973</identifier><identifier>EISBN: 146730199X</identifier><identifier>DOI: 10.1109/ICSAI.2012.6223162</identifier><language>eng</language><publisher>IEEE</publisher><subject>Benchmark testing ; efficiency ; equity ; Indexes ; Instruction sets ; Measurement ; metric ; Radio frequency ; resource ; Resource management ; thread</subject><ispartof>2012 International Conference on Systems and Informatics (ICSAI2012), 2012, p.932-937</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6223162$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6223162$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Hua Yang</creatorcontrib><creatorcontrib>Caiping Zheng</creatorcontrib><creatorcontrib>Xiangbin Shi</creatorcontrib><creatorcontrib>Zhuojin Pan</creatorcontrib><title>Resource efficiency and equity in chip Multithreading architecture</title><title>2012 International Conference on Systems and Informatics (ICSAI2012)</title><addtitle>ICSAI</addtitle><description>For Chip Multithreading (CMT) architecture, the inter-thread competition for resources has some uncontrollable and unwanted impacts on both any designated thread and the overall performance. A crucial reason lies in the absence of all-sided approaches to evaluate, predict and further control thread performance and resource utilization. In this paper, we take Rename-Register-File (RRF), a representative storage resource that is critical in regulating resource allocation and therein thread performance, for instance to study the efficiency and equity of resource allocation. For in-depth comparison, we devise two ideal allocation strategies, i.e. Maximizing Performance (MP) and Maximizing Fairness (MF). Then we propose three complementary metrics called Relative Fairness (RF), Efficiency Index (EI), and Effective Utilization (EU), respectively, and carry out a series of evaluations on MP, MF and various classical strategies. The results show that these metrics are objective and instructive, and thus meaningful for further improving thread scheduling and resource allocation.</description><subject>Benchmark testing</subject><subject>efficiency</subject><subject>equity</subject><subject>Indexes</subject><subject>Instruction sets</subject><subject>Measurement</subject><subject>metric</subject><subject>Radio frequency</subject><subject>resource</subject><subject>Resource management</subject><subject>thread</subject><isbn>9781467301985</isbn><isbn>1467301981</isbn><isbn>9781467301992</isbn><isbn>9781467301978</isbn><isbn>1467301973</isbn><isbn>146730199X</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVj8tKAzEYhSMiKHVeQDd5gRn_XJrLsg5eBiqCdl8yyR8bqWPNZBZ9ewfsxrM5nO_AgUPIDYOGMbB3Xfu-6hoOjDeKc8EUPyOV1YZJpQUwa_n5v2yWl6Qax0-YpbWRUl6R-zccv6fskWKMyScc_JG6IVD8mVI50jRQv0sH-jLtSyq7jC6k4YO6PNOCvkwZr8lFdPsRq5MvyObxYdM-1-vXp65dretkodQYuQ6olPcualgKLSKE3hjhXC8CiBhRMqURvA3BAtPosDchODm3vFdiQW7_ZhMibg85fbl83J6Oi1_H9k2T</recordid><startdate>201205</startdate><enddate>201205</enddate><creator>Hua Yang</creator><creator>Caiping Zheng</creator><creator>Xiangbin Shi</creator><creator>Zhuojin Pan</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201205</creationdate><title>Resource efficiency and equity in chip Multithreading architecture</title><author>Hua Yang ; Caiping Zheng ; Xiangbin Shi ; Zhuojin Pan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-ef27de66ccaf705373f0db883aab3d03ffe4167e0c9dd9017eaeb8dda43d02b63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Benchmark testing</topic><topic>efficiency</topic><topic>equity</topic><topic>Indexes</topic><topic>Instruction sets</topic><topic>Measurement</topic><topic>metric</topic><topic>Radio frequency</topic><topic>resource</topic><topic>Resource management</topic><topic>thread</topic><toplevel>online_resources</toplevel><creatorcontrib>Hua Yang</creatorcontrib><creatorcontrib>Caiping Zheng</creatorcontrib><creatorcontrib>Xiangbin Shi</creatorcontrib><creatorcontrib>Zhuojin Pan</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hua Yang</au><au>Caiping Zheng</au><au>Xiangbin Shi</au><au>Zhuojin Pan</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Resource efficiency and equity in chip Multithreading architecture</atitle><btitle>2012 International Conference on Systems and Informatics (ICSAI2012)</btitle><stitle>ICSAI</stitle><date>2012-05</date><risdate>2012</risdate><spage>932</spage><epage>937</epage><pages>932-937</pages><isbn>9781467301985</isbn><isbn>1467301981</isbn><eisbn>9781467301992</eisbn><eisbn>9781467301978</eisbn><eisbn>1467301973</eisbn><eisbn>146730199X</eisbn><abstract>For Chip Multithreading (CMT) architecture, the inter-thread competition for resources has some uncontrollable and unwanted impacts on both any designated thread and the overall performance. A crucial reason lies in the absence of all-sided approaches to evaluate, predict and further control thread performance and resource utilization. In this paper, we take Rename-Register-File (RRF), a representative storage resource that is critical in regulating resource allocation and therein thread performance, for instance to study the efficiency and equity of resource allocation. For in-depth comparison, we devise two ideal allocation strategies, i.e. Maximizing Performance (MP) and Maximizing Fairness (MF). Then we propose three complementary metrics called Relative Fairness (RF), Efficiency Index (EI), and Effective Utilization (EU), respectively, and carry out a series of evaluations on MP, MF and various classical strategies. The results show that these metrics are objective and instructive, and thus meaningful for further improving thread scheduling and resource allocation.</abstract><pub>IEEE</pub><doi>10.1109/ICSAI.2012.6223162</doi><tpages>6</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISBN: 9781467301985 |
ispartof | 2012 International Conference on Systems and Informatics (ICSAI2012), 2012, p.932-937 |
issn | |
language | eng |
recordid | cdi_ieee_primary_6223162 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Benchmark testing efficiency equity Indexes Instruction sets Measurement metric Radio frequency resource Resource management thread |
title | Resource efficiency and equity in chip Multithreading architecture |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T19%3A03%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Resource%20efficiency%20and%20equity%20in%20chip%20Multithreading%20architecture&rft.btitle=2012%20International%20Conference%20on%20Systems%20and%20Informatics%20(ICSAI2012)&rft.au=Hua%20Yang&rft.date=2012-05&rft.spage=932&rft.epage=937&rft.pages=932-937&rft.isbn=9781467301985&rft.isbn_list=1467301981&rft_id=info:doi/10.1109/ICSAI.2012.6223162&rft_dat=%3Cieee_6IE%3E6223162%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9781467301992&rft.eisbn_list=9781467301978&rft.eisbn_list=1467301973&rft.eisbn_list=146730199X&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6223162&rfr_iscdi=true |