Skinny trace compensation methodology for high speed serial interface

Skinny trace compensation methodology for high speed serial interface

Skinny trace compensation is a simple yet effective technique for overcoming capacitive impedance discontinuities on high speed channels. This paper provides a comprehensive system-level modeling and analysis methodology for implementing this technique on high speed serial interface. System level si...

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Hauptverfasser: Mi, M., Taliaferro, S., Murugan, R., de Araujo, Daniel
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creator Mi, M.
Taliaferro, S.
Murugan, R.
de Araujo, Daniel
description Skinny trace compensation is a simple yet effective technique for overcoming capacitive impedance discontinuities on high speed channels. This paper provides a comprehensive system-level modeling and analysis methodology for implementing this technique on high speed serial interface. System level simulation correlation to laboratory measurement for the HDMI (High Definition Multimedia Interface) interface on a real high speed low power mobile microprocessor SOC (System on Chip) design is presented.
doi_str_mv 10.1109/SaPIW.2012.6222900
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6222900</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6222900</ieee_id><sourcerecordid>6222900</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-d2669c4e2c88d23baac3d4607ce2c36a65d5ca201182b3a7cf4d0660f266c6a43</originalsourceid><addsrcrecordid>eNo1j89KxDAYxCMiqGtfQC95gdb8a9IeZVl1YUFhFzwu3yZft9G2KUkvfXsLrnMZZuA3MIQ8clZwzurnPXxuvwrBuCi0EKJm7Ircc6WN5CVT6ppktan-s9S3JEvpmy0ypuTG3JHN_scPw0ynCBapDf2IQ4LJh4H2OLXBhS6cZ9qESFt_bmkaER1NGD101A8TxmYBH8hNA13C7OIrcnjdHNbv-e7jbbt-2eW-ZlPuhNa1VShsVTkhTwBWOqWZsUslNejSlRaWM7wSJwnGNsoxrVmzcFaDkivy9DfrEfE4Rt9DnI-X4_IXGJRNBQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Skinny trace compensation methodology for high speed serial interface</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Mi, M. ; Taliaferro, S. ; Murugan, R. ; de Araujo, Daniel</creator><creatorcontrib>Mi, M. ; Taliaferro, S. ; Murugan, R. ; de Araujo, Daniel</creatorcontrib><description>Skinny trace compensation is a simple yet effective technique for overcoming capacitive impedance discontinuities on high speed channels. This paper provides a comprehensive system-level modeling and analysis methodology for implementing this technique on high speed serial interface. System level simulation correlation to laboratory measurement for the HDMI (High Definition Multimedia Interface) interface on a real high speed low power mobile microprocessor SOC (System on Chip) design is presented.</description><identifier>ISBN: 9781467315036</identifier><identifier>ISBN: 1467315036</identifier><identifier>EISBN: 1467315044</identifier><identifier>EISBN: 9781467315029</identifier><identifier>EISBN: 9781467315043</identifier><identifier>EISBN: 1467315028</identifier><identifier>DOI: 10.1109/SaPIW.2012.6222900</identifier><language>eng</language><publisher>IEEE</publisher><subject>Abstracts ; Loading</subject><ispartof>2012 IEEE 16th Workshop on Signal and Power Integrity (SPI), 2012, p.11-12</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6222900$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,778,782,787,788,2054,27908,54903</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6222900$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Mi, M.</creatorcontrib><creatorcontrib>Taliaferro, S.</creatorcontrib><creatorcontrib>Murugan, R.</creatorcontrib><creatorcontrib>de Araujo, Daniel</creatorcontrib><title>Skinny trace compensation methodology for high speed serial interface</title><title>2012 IEEE 16th Workshop on Signal and Power Integrity (SPI)</title><addtitle>SaPIW</addtitle><description>Skinny trace compensation is a simple yet effective technique for overcoming capacitive impedance discontinuities on high speed channels. This paper provides a comprehensive system-level modeling and analysis methodology for implementing this technique on high speed serial interface. System level simulation correlation to laboratory measurement for the HDMI (High Definition Multimedia Interface) interface on a real high speed low power mobile microprocessor SOC (System on Chip) design is presented.</description><subject>Abstracts</subject><subject>Loading</subject><isbn>9781467315036</isbn><isbn>1467315036</isbn><isbn>1467315044</isbn><isbn>9781467315029</isbn><isbn>9781467315043</isbn><isbn>1467315028</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1j89KxDAYxCMiqGtfQC95gdb8a9IeZVl1YUFhFzwu3yZft9G2KUkvfXsLrnMZZuA3MIQ8clZwzurnPXxuvwrBuCi0EKJm7Ircc6WN5CVT6ppktan-s9S3JEvpmy0ypuTG3JHN_scPw0ynCBapDf2IQ4LJh4H2OLXBhS6cZ9qESFt_bmkaER1NGD101A8TxmYBH8hNA13C7OIrcnjdHNbv-e7jbbt-2eW-ZlPuhNa1VShsVTkhTwBWOqWZsUslNejSlRaWM7wSJwnGNsoxrVmzcFaDkivy9DfrEfE4Rt9DnI-X4_IXGJRNBQ</recordid><startdate>201205</startdate><enddate>201205</enddate><creator>Mi, M.</creator><creator>Taliaferro, S.</creator><creator>Murugan, R.</creator><creator>de Araujo, Daniel</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201205</creationdate><title>Skinny trace compensation methodology for high speed serial interface</title><author>Mi, M. ; Taliaferro, S. ; Murugan, R. ; de Araujo, Daniel</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-d2669c4e2c88d23baac3d4607ce2c36a65d5ca201182b3a7cf4d0660f266c6a43</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Abstracts</topic><topic>Loading</topic><toplevel>online_resources</toplevel><creatorcontrib>Mi, M.</creatorcontrib><creatorcontrib>Taliaferro, S.</creatorcontrib><creatorcontrib>Murugan, R.</creatorcontrib><creatorcontrib>de Araujo, Daniel</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mi, M.</au><au>Taliaferro, S.</au><au>Murugan, R.</au><au>de Araujo, Daniel</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Skinny trace compensation methodology for high speed serial interface</atitle><btitle>2012 IEEE 16th Workshop on Signal and Power Integrity (SPI)</btitle><stitle>SaPIW</stitle><date>2012-05</date><risdate>2012</risdate><spage>11</spage><epage>12</epage><pages>11-12</pages><isbn>9781467315036</isbn><isbn>1467315036</isbn><eisbn>1467315044</eisbn><eisbn>9781467315029</eisbn><eisbn>9781467315043</eisbn><eisbn>1467315028</eisbn><abstract>Skinny trace compensation is a simple yet effective technique for overcoming capacitive impedance discontinuities on high speed channels. This paper provides a comprehensive system-level modeling and analysis methodology for implementing this technique on high speed serial interface. System level simulation correlation to laboratory measurement for the HDMI (High Definition Multimedia Interface) interface on a real high speed low power mobile microprocessor SOC (System on Chip) design is presented.</abstract><pub>IEEE</pub><doi>10.1109/SaPIW.2012.6222900</doi><tpages>2</tpages></addata></record>
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title Skinny trace compensation methodology for high speed serial interface
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T06%3A11%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Skinny%20trace%20compensation%20methodology%20for%20high%20speed%20serial%20interface&rft.btitle=2012%20IEEE%2016th%20Workshop%20on%20Signal%20and%20Power%20Integrity%20(SPI)&rft.au=Mi,%20M.&rft.date=2012-05&rft.spage=11&rft.epage=12&rft.pages=11-12&rft.isbn=9781467315036&rft.isbn_list=1467315036&rft_id=info:doi/10.1109/SaPIW.2012.6222900&rft_dat=%3Cieee_6IE%3E6222900%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1467315044&rft.eisbn_list=9781467315029&rft.eisbn_list=9781467315043&rft.eisbn_list=1467315028&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6222900&rfr_iscdi=true