A new 81 level inverter with reduced number of switches
This paper proposes a trinary hybrid 81-level multilevel inverter for medium voltage applications. Benefiting from the trinary hybrid topology of the inverter, 81-level can be synthesized with the fewest components. Particularly, an 81-level inverter is an optimization in the number of levels for a...
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 489 |
|---|---|
| container_issue | |
| container_start_page | 485 |
| container_title | |
| container_volume | |
| creator | Rahila, J. Santhi, M. Kannabhiran, A. |
| description | This paper proposes a trinary hybrid 81-level multilevel inverter for medium voltage applications. Benefiting from the trinary hybrid topology of the inverter, 81-level can be synthesized with the fewest components. Particularly, an 81-level inverter is an optimization in the number of levels for a given number of power transistors in power converters. The main disadvantage of the conventional topology is the large number of power supplies and semiconductors required to obtain these multistep voltage waveforms. The proposed topology significantly reduces the number of IGBTs and their gate driver circuits as the number of output voltage levels increase. The proposed inverter can synthesize high quality output voltage near to sinusoidal waves. The circuit configuration is simple and easy to control. The operational principle and key waveforms are illustrated and analyzed. To validate the proposed topology, the circuit is simulated and verified for constant frequency and constant voltage operation using MatLab Simulink. |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6216162</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6216162</ieee_id><sourcerecordid>6216162</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-2d211db800d2d1a1e906c330aee5af9e43fb5066d06304ad4522da486ad99ed53</originalsourceid><addsrcrecordid>eNotjMtqwzAQAFVKoW3qL-hFP2DYXT0sHUPoCwK55B5k75q4OG6RnIT-fQ3tXAbmMDfqMWCECJYIb1UVm4DWNwYIjbtXVSmfsNAANcE_qGatJ7nqgHqUi4x6mC6SZ8n6OsxHnYXPnbCezqd2aV-9LkvvjlKe1F2fxiLVv1dq__qy37zX293bx2a9rYcIc01MiNwGACbGhBLBd8ZAEnGpj2JN3zrwnsEbsImtI-Jkg08co7AzK_X8tx1E5PCdh1PKPwdP6NGT-QWkpkCr</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A new 81 level inverter with reduced number of switches</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Rahila, J. ; Santhi, M. ; Kannabhiran, A.</creator><creatorcontrib>Rahila, J. ; Santhi, M. ; Kannabhiran, A.</creatorcontrib><description>This paper proposes a trinary hybrid 81-level multilevel inverter for medium voltage applications. Benefiting from the trinary hybrid topology of the inverter, 81-level can be synthesized with the fewest components. Particularly, an 81-level inverter is an optimization in the number of levels for a given number of power transistors in power converters. The main disadvantage of the conventional topology is the large number of power supplies and semiconductors required to obtain these multistep voltage waveforms. The proposed topology significantly reduces the number of IGBTs and their gate driver circuits as the number of output voltage levels increase. The proposed inverter can synthesize high quality output voltage near to sinusoidal waves. The circuit configuration is simple and easy to control. The operational principle and key waveforms are illustrated and analyzed. To validate the proposed topology, the circuit is simulated and verified for constant frequency and constant voltage operation using MatLab Simulink.</description><identifier>ISBN: 9781467302135</identifier><identifier>ISBN: 1467302139</identifier><identifier>EISBN: 8190904221</identifier><identifier>EISBN: 9788190904223</identifier><language>eng</language><publisher>IEEE</publisher><subject>81- levels ; Hybrid multilevel inverter ; Hybrid power systems ; Insulated gate bipolar transistors ; Inverters ; Logic gates ; minimum switches ; Power supplies ; Power transistors ; Topology ; trinary distributed DC sources</subject><ispartof>IEEE-International Conference On Advances In Engineering, Science And Management (ICAESM -2012), 2012, p.485-489</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6216162$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6216162$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Rahila, J.</creatorcontrib><creatorcontrib>Santhi, M.</creatorcontrib><creatorcontrib>Kannabhiran, A.</creatorcontrib><title>A new 81 level inverter with reduced number of switches</title><title>IEEE-International Conference On Advances In Engineering, Science And Management (ICAESM -2012)</title><addtitle>ICAESM</addtitle><description>This paper proposes a trinary hybrid 81-level multilevel inverter for medium voltage applications. Benefiting from the trinary hybrid topology of the inverter, 81-level can be synthesized with the fewest components. Particularly, an 81-level inverter is an optimization in the number of levels for a given number of power transistors in power converters. The main disadvantage of the conventional topology is the large number of power supplies and semiconductors required to obtain these multistep voltage waveforms. The proposed topology significantly reduces the number of IGBTs and their gate driver circuits as the number of output voltage levels increase. The proposed inverter can synthesize high quality output voltage near to sinusoidal waves. The circuit configuration is simple and easy to control. The operational principle and key waveforms are illustrated and analyzed. To validate the proposed topology, the circuit is simulated and verified for constant frequency and constant voltage operation using MatLab Simulink.</description><subject>81- levels</subject><subject>Hybrid multilevel inverter</subject><subject>Hybrid power systems</subject><subject>Insulated gate bipolar transistors</subject><subject>Inverters</subject><subject>Logic gates</subject><subject>minimum switches</subject><subject>Power supplies</subject><subject>Power transistors</subject><subject>Topology</subject><subject>trinary distributed DC sources</subject><isbn>9781467302135</isbn><isbn>1467302139</isbn><isbn>8190904221</isbn><isbn>9788190904223</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjMtqwzAQAFVKoW3qL-hFP2DYXT0sHUPoCwK55B5k75q4OG6RnIT-fQ3tXAbmMDfqMWCECJYIb1UVm4DWNwYIjbtXVSmfsNAANcE_qGatJ7nqgHqUi4x6mC6SZ8n6OsxHnYXPnbCezqd2aV-9LkvvjlKe1F2fxiLVv1dq__qy37zX293bx2a9rYcIc01MiNwGACbGhBLBd8ZAEnGpj2JN3zrwnsEbsImtI-Jkg08co7AzK_X8tx1E5PCdh1PKPwdP6NGT-QWkpkCr</recordid><startdate>201203</startdate><enddate>201203</enddate><creator>Rahila, J.</creator><creator>Santhi, M.</creator><creator>Kannabhiran, A.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201203</creationdate><title>A new 81 level inverter with reduced number of switches</title><author>Rahila, J. ; Santhi, M. ; Kannabhiran, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-2d211db800d2d1a1e906c330aee5af9e43fb5066d06304ad4522da486ad99ed53</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>81- levels</topic><topic>Hybrid multilevel inverter</topic><topic>Hybrid power systems</topic><topic>Insulated gate bipolar transistors</topic><topic>Inverters</topic><topic>Logic gates</topic><topic>minimum switches</topic><topic>Power supplies</topic><topic>Power transistors</topic><topic>Topology</topic><topic>trinary distributed DC sources</topic><toplevel>online_resources</toplevel><creatorcontrib>Rahila, J.</creatorcontrib><creatorcontrib>Santhi, M.</creatorcontrib><creatorcontrib>Kannabhiran, A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rahila, J.</au><au>Santhi, M.</au><au>Kannabhiran, A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A new 81 level inverter with reduced number of switches</atitle><btitle>IEEE-International Conference On Advances In Engineering, Science And Management (ICAESM -2012)</btitle><stitle>ICAESM</stitle><date>2012-03</date><risdate>2012</risdate><spage>485</spage><epage>489</epage><pages>485-489</pages><isbn>9781467302135</isbn><isbn>1467302139</isbn><eisbn>8190904221</eisbn><eisbn>9788190904223</eisbn><abstract>This paper proposes a trinary hybrid 81-level multilevel inverter for medium voltage applications. Benefiting from the trinary hybrid topology of the inverter, 81-level can be synthesized with the fewest components. Particularly, an 81-level inverter is an optimization in the number of levels for a given number of power transistors in power converters. The main disadvantage of the conventional topology is the large number of power supplies and semiconductors required to obtain these multistep voltage waveforms. The proposed topology significantly reduces the number of IGBTs and their gate driver circuits as the number of output voltage levels increase. The proposed inverter can synthesize high quality output voltage near to sinusoidal waves. The circuit configuration is simple and easy to control. The operational principle and key waveforms are illustrated and analyzed. To validate the proposed topology, the circuit is simulated and verified for constant frequency and constant voltage operation using MatLab Simulink.</abstract><pub>IEEE</pub><tpages>5</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 9781467302135 |
| ispartof | IEEE-International Conference On Advances In Engineering, Science And Management (ICAESM -2012), 2012, p.485-489 |
| issn | |
| language | eng |
| recordid | cdi_ieee_primary_6216162 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | 81- levels Hybrid multilevel inverter Hybrid power systems Insulated gate bipolar transistors Inverters Logic gates minimum switches Power supplies Power transistors Topology trinary distributed DC sources |
| title | A new 81 level inverter with reduced number of switches |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T19%3A01%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20new%2081%20level%20inverter%20with%20reduced%20number%20of%20switches&rft.btitle=IEEE-International%20Conference%20On%20Advances%20In%20Engineering,%20Science%20And%20Management%20(ICAESM%20-2012)&rft.au=Rahila,%20J.&rft.date=2012-03&rft.spage=485&rft.epage=489&rft.pages=485-489&rft.isbn=9781467302135&rft.isbn_list=1467302139&rft_id=info:doi/&rft_dat=%3Cieee_6IE%3E6216162%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=8190904221&rft.eisbn_list=9788190904223&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6216162&rfr_iscdi=true |