A Fault-Tolerant Area-Efficient Current-Mode ADC for Multiple-Valued Neural Networks

In this paper a new expandable current-mode Analog to Digital Conversion method is proposed for multiple-valued neural networks. The proposed method employs a semi-parallel architecture of current comparators to reduce the conversion time. A feedback path is used to regulate the outputs of the compa...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Saffar, F., Mirhassani, M., Ahmadi, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Analog to Digital Converter Current-Mode Delay Fault tolerance Fault tolerant systems Logic gates Multiple-Valued Neural Network Neural networks Regulators Transistors
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