Déjà Vu Switching for Multiplane NoCs

In chip-multiprocessors (CMPs) the network-on-chip (NoC) carries cache coherence and data messages. These messages may be classified into critical and non-critical messages. Hence, instead of having one interconnect plane to serve all traffic, power can be saved if the NoC is split into two planes:...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Abousamra, A. K., Melhem, R. G., Jones, A. K.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	circuit switching Coherence Delay energy-efficient architectures heterogeneous NoC Integrated circuit interconnections multiplane NoC network-on-chip NoC Routing Switches Switching circuits System performance
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