Performance-Sensitivity-based Workload Tailoring for Effective Design Exploration
Early-stage design exploration requires the detailed simulation which is running applications on a cycle-level microprocessor simulator. Main objectives of simulation-level design exploration include understanding the architectural behaviors of target applications and finding optimal configurations...
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creator | Jie Luo Yilin Zhang Vadlamani, S. Byeong Kil Lee |
description | Early-stage design exploration requires the detailed simulation which is running applications on a cycle-level microprocessor simulator. Main objectives of simulation-level design exploration include understanding the architectural behaviors of target applications and finding optimal configurations to cover wide range of applications in terms of performance and power. However, full simulation of an industry standard benchmark suite (e.g., SPEC CPU 2006) takes several weeks to months to complete. This problem has motivated several research groups to come up with methodologies to reduce simulation time while maintaining a certain level of accuracy. Among many techniques for reducing simulation time, a tool called Sim Point is popularly used. However, simulation load even with the reduced workloads is still heavy, considering design complexity of modern microprocessors. Basic motivation of this research is started from how design exploration is actually performed. Designers will observe the performance impact from resource variations or configuration changes. If a simulation point shows low sensitivity to resource variations, designers would eliminate those simulation points from the simulation setup procedure. In this paper, we focus on identifying those simulation points which have high sensitivity or low sensitivity, by which overall simulation methodology can be effectively improved. We also performed the performance-sensitivity-based similarity analysis (grouping) among simulation points on specific performance metric which can be an overall performance metric or a component-level metric. |
doi_str_mv | 10.1109/ITNG.2012.112 |
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Main objectives of simulation-level design exploration include understanding the architectural behaviors of target applications and finding optimal configurations to cover wide range of applications in terms of performance and power. However, full simulation of an industry standard benchmark suite (e.g., SPEC CPU 2006) takes several weeks to months to complete. This problem has motivated several research groups to come up with methodologies to reduce simulation time while maintaining a certain level of accuracy. Among many techniques for reducing simulation time, a tool called Sim Point is popularly used. However, simulation load even with the reduced workloads is still heavy, considering design complexity of modern microprocessors. Basic motivation of this research is started from how design exploration is actually performed. Designers will observe the performance impact from resource variations or configuration changes. If a simulation point shows low sensitivity to resource variations, designers would eliminate those simulation points from the simulation setup procedure. In this paper, we focus on identifying those simulation points which have high sensitivity or low sensitivity, by which overall simulation methodology can be effectively improved. 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If a simulation point shows low sensitivity to resource variations, designers would eliminate those simulation points from the simulation setup procedure. In this paper, we focus on identifying those simulation points which have high sensitivity or low sensitivity, by which overall simulation methodology can be effectively improved. We also performed the performance-sensitivity-based similarity analysis (grouping) among simulation points on specific performance metric which can be an overall performance metric or a component-level metric.</description><subject>Benchmark testing</subject><subject>early-stage design exploration</subject><subject>Hardware</subject><subject>Hidden Markov models</subject><subject>Mathematical model</subject><subject>performance evaluation</subject><subject>Sensitivity</subject><subject>workload characterization</subject><subject>workload reduction</subject><isbn>9781467307987</isbn><isbn>146730798X</isbn><isbn>9780769546544</isbn><isbn>0769546544</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotkEtLAzEcxCMiKHWPnrzkC2z9550cpa61UHzggseSzaMEt7tls4j99gb1NPxmhjkMQjcEloSAudu0z-slBUIL0jNUGaVBSSO4FJyf_zLhUjFQRqtLVOWcOqBSSakVuUJvr2GK43Swgwv1exhymtNXmk91Z3Pw-GOcPvvRetza1I9TGva4tHETY3ClGPBDyGk_4Ob7WGI7p3G4RhfR9jlU_7pA7WPTrp7q7ct6s7rf1snAXCsdwSmnhaPeMy-jMNx4wiyzkXZARNdp7hVQXhwDIoLUQionohIAGtgC3f7NphDC7jilg51OO0nBlDPYD_vWUJw</recordid><startdate>201204</startdate><enddate>201204</enddate><creator>Jie Luo</creator><creator>Yilin Zhang</creator><creator>Vadlamani, S.</creator><creator>Byeong Kil Lee</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201204</creationdate><title>Performance-Sensitivity-based Workload Tailoring for Effective Design Exploration</title><author>Jie Luo ; Yilin Zhang ; Vadlamani, S. ; Byeong Kil Lee</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-78f0c7c85c2dd3d6f5949d13a3af2b015bb84d7024a3a905f068567c5f7500803</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Benchmark testing</topic><topic>early-stage design exploration</topic><topic>Hardware</topic><topic>Hidden Markov models</topic><topic>Mathematical model</topic><topic>performance evaluation</topic><topic>Sensitivity</topic><topic>workload characterization</topic><topic>workload reduction</topic><toplevel>online_resources</toplevel><creatorcontrib>Jie Luo</creatorcontrib><creatorcontrib>Yilin Zhang</creatorcontrib><creatorcontrib>Vadlamani, S.</creatorcontrib><creatorcontrib>Byeong Kil Lee</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jie Luo</au><au>Yilin Zhang</au><au>Vadlamani, S.</au><au>Byeong Kil Lee</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Performance-Sensitivity-based Workload Tailoring for Effective Design Exploration</atitle><btitle>2012 Ninth International Conference on Information Technology - New Generations</btitle><stitle>itng</stitle><date>2012-04</date><risdate>2012</risdate><spage>496</spage><epage>501</epage><pages>496-501</pages><isbn>9781467307987</isbn><isbn>146730798X</isbn><eisbn>9780769546544</eisbn><eisbn>0769546544</eisbn><abstract>Early-stage design exploration requires the detailed simulation which is running applications on a cycle-level microprocessor simulator. Main objectives of simulation-level design exploration include understanding the architectural behaviors of target applications and finding optimal configurations to cover wide range of applications in terms of performance and power. However, full simulation of an industry standard benchmark suite (e.g., SPEC CPU 2006) takes several weeks to months to complete. This problem has motivated several research groups to come up with methodologies to reduce simulation time while maintaining a certain level of accuracy. Among many techniques for reducing simulation time, a tool called Sim Point is popularly used. However, simulation load even with the reduced workloads is still heavy, considering design complexity of modern microprocessors. Basic motivation of this research is started from how design exploration is actually performed. Designers will observe the performance impact from resource variations or configuration changes. If a simulation point shows low sensitivity to resource variations, designers would eliminate those simulation points from the simulation setup procedure. In this paper, we focus on identifying those simulation points which have high sensitivity or low sensitivity, by which overall simulation methodology can be effectively improved. We also performed the performance-sensitivity-based similarity analysis (grouping) among simulation points on specific performance metric which can be an overall performance metric or a component-level metric.</abstract><pub>IEEE</pub><doi>10.1109/ITNG.2012.112</doi><tpages>6</tpages></addata></record> |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Benchmark testing early-stage design exploration Hardware Hidden Markov models Mathematical model performance evaluation Sensitivity workload characterization workload reduction |
title | Performance-Sensitivity-based Workload Tailoring for Effective Design Exploration |
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