Formal hardware verification with BDDs: an introduction

This paper is a brief introduction to the main paradigms for using BDDs (binary decision diagrams) in formal hardware verification. The paper addresses two audiences: for people doing theoretical BDD research, the paper gives a glimpse of the problems in the main application area; and for people bui...

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1. Verfasser:	Hu, A.J.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Application software Binary decision diagrams Boolean functions Computational modeling Computer bugs Computer science Data structures Formal verification Hardware Paper technology
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container_end_page	682 vol.2
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creator	Hu, A.J.
description	This paper is a brief introduction to the main paradigms for using BDDs (binary decision diagrams) in formal hardware verification. The paper addresses two audiences: for people doing theoretical BDD research, the paper gives a glimpse of the problems in the main application area; and for people building hardware, the paper gives a peek under the hood of the formal verification technologies that are rapidly gaining industrial importance. Topics described include combinational equivalence checking, symbolic simulation, sequential equivalence checking, model checking and symbolic trajectory evaluation.
doi_str_mv	10.1109/PACRIM.1997.620351
format	Conference Proceeding
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identifier	ISBN: 0780339053
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source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	Application software Binary decision diagrams Boolean functions Computational modeling Computer bugs Computer science Data structures Formal verification Hardware Paper technology
title	Formal hardware verification with BDDs: an introduction
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