Design and realization of Serial Front Panel Data Port (SFPDP) protocol
This paper presents design & realization of Serial Front Panel Data Port (SFPDP) protocol for high speed data transfer. High-speed data transfer finds application in most modern day communication systems. This design has been mainly done for data transfer in radar systems but can be programmed a...
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description | This paper presents design & realization of Serial Front Panel Data Port (SFPDP) protocol for high speed data transfer. High-speed data transfer finds application in most modern day communication systems. This design has been mainly done for data transfer in radar systems but can be programmed and used for variety of applications involving high-speed data transfer. The design follows a systematic approach with design of SFPDP protocol and implementation on FPGA and explains all these stages of design in detail. The design can be programmed to work at different speeds as required by different systems and thus can be used in variety of systems involving high-speed data transfers. The efficient use of customized IP cores and resources of FPGA delivers high level of performance and area efficiency. |
doi_str_mv | 10.1109/CECNet.2012.6202148 |
format | Conference Proceeding |
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High-speed data transfer finds application in most modern day communication systems. This design has been mainly done for data transfer in radar systems but can be programmed and used for variety of applications involving high-speed data transfer. The design follows a systematic approach with design of SFPDP protocol and implementation on FPGA and explains all these stages of design in detail. The design can be programmed to work at different speeds as required by different systems and thus can be used in variety of systems involving high-speed data transfers. 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High-speed data transfer finds application in most modern day communication systems. This design has been mainly done for data transfer in radar systems but can be programmed and used for variety of applications involving high-speed data transfer. The design follows a systematic approach with design of SFPDP protocol and implementation on FPGA and explains all these stages of design in detail. The design can be programmed to work at different speeds as required by different systems and thus can be used in variety of systems involving high-speed data transfers. The efficient use of customized IP cores and resources of FPGA delivers high level of performance and area efficiency.</description><subject>Buffer storage</subject><subject>Field programmable gate arrays</subject><subject>FPDP</subject><subject>FPGA</subject><subject>Generators</subject><subject>Optical fiber cables</subject><subject>Protocols</subject><subject>Receivers</subject><subject>SFPDP</subject><subject>SOF</subject><subject>Synchronization</subject><subject>XAUI</subject><isbn>9781457714146</isbn><isbn>1457714140</isbn><isbn>9781457714139</isbn><isbn>9781457714153</isbn><isbn>1457714132</isbn><isbn>1457714159</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVj81Kw0AURkdEUGqeoJtZ6iJx_pNZStJUoWig3ZebzI2MxEyZzEafXsFu-m0OZ3PgI2TNWcE5s0_1pn7DVAjGRWEEE1xVVySzZcWVLkuuuLTXF67MLcmW5ZP9rWSiUvaObBtc_MdMYXY0Ikz-B5IPMw0j3WP0MNE2hjnRDmacaAMJaBdiog_7tmu6R3qKIYUhTPfkZoRpwezMFTm0m0P9ku_et6_18y73lqV8HFAKXZUSoRd6hFFzZrRVygkL1nEGpnSmZ1JXoFFzaZTrnUY-GsfUoOSKrP-zHhGPp-i_IH4fz-_lL3K6THo</recordid><startdate>201204</startdate><enddate>201204</enddate><creator>Mattihalli, C.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201204</creationdate><title>Design and realization of Serial Front Panel Data Port (SFPDP) protocol</title><author>Mattihalli, C.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-fce325873eab25faf51065944d29a9d10a67d6b0358a5e51364dbd5e1f6d04c43</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Buffer storage</topic><topic>Field programmable gate arrays</topic><topic>FPDP</topic><topic>FPGA</topic><topic>Generators</topic><topic>Optical fiber cables</topic><topic>Protocols</topic><topic>Receivers</topic><topic>SFPDP</topic><topic>SOF</topic><topic>Synchronization</topic><topic>XAUI</topic><toplevel>online_resources</toplevel><creatorcontrib>Mattihalli, C.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mattihalli, C.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Design and realization of Serial Front Panel Data Port (SFPDP) protocol</atitle><btitle>2012 2nd International Conference on Consumer Electronics, Communications and Networks (CECNet)</btitle><stitle>CECNet</stitle><date>2012-04</date><risdate>2012</risdate><spage>2505</spage><epage>2509</epage><pages>2505-2509</pages><isbn>9781457714146</isbn><isbn>1457714140</isbn><eisbn>9781457714139</eisbn><eisbn>9781457714153</eisbn><eisbn>1457714132</eisbn><eisbn>1457714159</eisbn><abstract>This paper presents design & realization of Serial Front Panel Data Port (SFPDP) protocol for high speed data transfer. High-speed data transfer finds application in most modern day communication systems. This design has been mainly done for data transfer in radar systems but can be programmed and used for variety of applications involving high-speed data transfer. The design follows a systematic approach with design of SFPDP protocol and implementation on FPGA and explains all these stages of design in detail. The design can be programmed to work at different speeds as required by different systems and thus can be used in variety of systems involving high-speed data transfers. The efficient use of customized IP cores and resources of FPGA delivers high level of performance and area efficiency.</abstract><pub>IEEE</pub><doi>10.1109/CECNet.2012.6202148</doi><tpages>5</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Buffer storage Field programmable gate arrays FPDP FPGA Generators Optical fiber cables Protocols Receivers SFPDP SOF Synchronization XAUI |
title | Design and realization of Serial Front Panel Data Port (SFPDP) protocol |
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