Generating instruction streams using abstract CSP

One of the challenges that processor level stimuli generators are facing is the need to generate stimuli that exercise microarchitectural mechanisms deep inside the verified processor. These scenarios require specific relations between the instructions participating in them. We present a new approac...

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Bibliographische Detailangaben

Hauptverfasser:	Katz, Y., Rimon, M., Ziv, A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Buffer storage Engines Generators Joining processes Memory management Microarchitecture Registers
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