Generating instruction streams using abstract CSP
One of the challenges that processor level stimuli generators are facing is the need to generate stimuli that exercise microarchitectural mechanisms deep inside the verified processor. These scenarios require specific relations between the instructions participating in them. We present a new approac...
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| creator | Katz, Y. Rimon, M. Ziv, A. |
| description | One of the challenges that processor level stimuli generators are facing is the need to generate stimuli that exercise microarchitectural mechanisms deep inside the verified processor. These scenarios require specific relations between the instructions participating in them. We present a new approach for processor-level scenario generation. The approach is based on creating an abstract constraint satisfaction problem, which captures the essence of the requested scenario. The generation of stimuli is done by interleaving between progress in the solution of the abstract CSP and generation of instructions. Compared with existing solutions of scenario generation, this approach yields improved coverage and reduced generation fail rate. |
| doi_str_mv | 10.1109/DATE.2012.6176425 |
| format | Conference Proceeding |
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| issn | 1530-1591 1558-1101 |
| language | eng |
| recordid | cdi_ieee_primary_6176425 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Buffer storage Engines Generators Joining processes Memory management Microarchitecture Registers |
| title | Generating instruction streams using abstract CSP |
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