Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs
Intelligently partitioning the last-level cache within a chip multiprocessor can bring significant performance improvements. Resources are given to the applications that can benefit most from them, restricting each core to a number of logical cache ways. However, although overall performance is incr...
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creator | Sundararajan, K. T. Porpodas, V. Jones, T. M. Topham, N. P. Franke, B. |
description | Intelligently partitioning the last-level cache within a chip multiprocessor can bring significant performance improvements. Resources are given to the applications that can benefit most from them, restricting each core to a number of logical cache ways. However, although overall performance is increased, existing schemes fail to consider energy saving when making their partitioning decisions. This paper presents Cooperative Partitioning, a runtime partitioning scheme that reduces both dynamic and static energy while maintaining high performance. It works by enforcing cached data to be way-aligned, so that a way is owned by a single core at any time. Cores cooperate with each other to migrate ways between themselves after partitioning decisions have been made. Upon access to the cache, a core needs only to consult the ways that it owns to find its data, saving dynamic energy. Unused ways can be power-gated for static energy saving. We evaluate our approach on two-core and four-core systems, showing that we obtain average dynamic and static energy savings of 35% and 25% compared to a fixed partitioning scheme. In addition, Cooperative Partitioning maintains high performance while transferring ways five times faster than an existing state-of-the-art technique. |
doi_str_mv | 10.1109/HPCA.2012.6169036 |
format | Conference Proceeding |
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It works by enforcing cached data to be way-aligned, so that a way is owned by a single core at any time. Cores cooperate with each other to migrate ways between themselves after partitioning decisions have been made. Upon access to the cache, a core needs only to consult the ways that it owns to find its data, saving dynamic energy. Unused ways can be power-gated for static energy saving. We evaluate our approach on two-core and four-core systems, showing that we obtain average dynamic and static energy savings of 35% and 25% compared to a fixed partitioning scheme. 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P.</au><au>Franke, B.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs</atitle><btitle>IEEE International Symposium on High-Performance Comp Architecture</btitle><stitle>HPCA</stitle><date>2012-02</date><risdate>2012</risdate><spage>1</spage><epage>12</epage><pages>1-12</pages><issn>1530-0897</issn><eissn>2378-203X</eissn><isbn>9781467308274</isbn><isbn>1467308277</isbn><eisbn>9781467308267</eisbn><eisbn>1467308250</eisbn><eisbn>9781467308250</eisbn><eisbn>1467308269</eisbn><abstract>Intelligently partitioning the last-level cache within a chip multiprocessor can bring significant performance improvements. Resources are given to the applications that can benefit most from them, restricting each core to a number of logical cache ways. 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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Hardware Monitoring Partitioning algorithms Registers Resource management Vectors Wireless application protocol |
title | Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs |
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