A permutation network for configurable and scalable FFT processors

A permutation network for configurable and scalable FFT processors

In this paper, we propose a permutation network, a key component for configurable and scalable FFT processors, to perform a set of permutations on streaming data. The method presented for constructing such permutation networks applies to permutations that can be represented as linear mappings on the...

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Hauptverfasser: Shuai Chen, Jialin Chen, Kanwen Wang, Wei Cao, Lingli Wang
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Sprache:eng
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Digital video broadcasting
iterative Cooley-Tukey FFT
permutation network
streaming architecture
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creator Shuai Chen
Jialin Chen
Kanwen Wang
Wei Cao
Lingli Wang
description In this paper, we propose a permutation network, a key component for configurable and scalable FFT processors, to perform a set of permutations on streaming data. The method presented for constructing such permutation networks applies to permutations that can be represented as linear mappings on the bit representation of data location. The permutation network, consisting of several independent RAM blocks and two interconnection networks, is capable of operating in a pipelined way. To reduce the hardware complexity of permutation network significantly, a streaming architecture is adopted. Simulation is performed to verify the correctness of permutation network and implementation results are given.
doi_str_mv 10.1109/ASICON.2011.6157323
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fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6157323</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6157323</ieee_id><sourcerecordid>6157323</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-82c55303bf297e51f90d906cec9838ec2c17760c245fffc5059aac8188a89f9f3</originalsourceid><addsrcrecordid>eNpVkN9KwzAchaNTcMw-wW7yAq35Jc2_y1qsDoa7WC-8G1mWSLVrStIhvr2iQ_DcfBw-OBcHoSWQAoDou2q7qjfPBSUAhQAuGWUXKNNSgQCqStDAL9GcgqC55Pxl9s9RevXnSrhBWUpv5DtCKCnEHN1XeHTxeJrM1IUBD276CPEd-xCxDYPvXk_R7HuHzXDAyZr-pzRNi8cYrEspxHSLrr3pk8vOXKC2eWjrp3y9eVzV1TrvNJlyRS3njLC9p1o6Dl6TgybCOqsVU85SC1IKYmnJvfeWE66NsQqUMkp77dkCLX9nO-fcbozd0cTP3fkQ9gX1HU_w</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A permutation network for configurable and scalable FFT processors</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Shuai Chen ; Jialin Chen ; Kanwen Wang ; Wei Cao ; Lingli Wang</creator><creatorcontrib>Shuai Chen ; Jialin Chen ; Kanwen Wang ; Wei Cao ; Lingli Wang</creatorcontrib><description>In this paper, we propose a permutation network, a key component for configurable and scalable FFT processors, to perform a set of permutations on streaming data. The method presented for constructing such permutation networks applies to permutations that can be represented as linear mappings on the bit representation of data location. The permutation network, consisting of several independent RAM blocks and two interconnection networks, is capable of operating in a pipelined way. To reduce the hardware complexity of permutation network significantly, a streaming architecture is adopted. Simulation is performed to verify the correctness of permutation network and implementation results are given.</description><identifier>ISSN: 2162-7541</identifier><identifier>ISBN: 9781612841922</identifier><identifier>ISBN: 1612841929</identifier><identifier>EISSN: 2162-755X</identifier><identifier>EISBN: 9781612841915</identifier><identifier>EISBN: 9781612841939</identifier><identifier>EISBN: 1612841910</identifier><identifier>EISBN: 1612841937</identifier><identifier>DOI: 10.1109/ASICON.2011.6157323</identifier><language>eng</language><publisher>IEEE</publisher><subject>Digital video broadcasting ; iterative Cooley-Tukey FFT ; permutation network ; streaming architecture</subject><ispartof>2011 9th IEEE International Conference on ASIC, 2011, p.787-790</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6157323$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6157323$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Shuai Chen</creatorcontrib><creatorcontrib>Jialin Chen</creatorcontrib><creatorcontrib>Kanwen Wang</creatorcontrib><creatorcontrib>Wei Cao</creatorcontrib><creatorcontrib>Lingli Wang</creatorcontrib><title>A permutation network for configurable and scalable FFT processors</title><title>2011 9th IEEE International Conference on ASIC</title><addtitle>ASICON</addtitle><description>In this paper, we propose a permutation network, a key component for configurable and scalable FFT processors, to perform a set of permutations on streaming data. The method presented for constructing such permutation networks applies to permutations that can be represented as linear mappings on the bit representation of data location. The permutation network, consisting of several independent RAM blocks and two interconnection networks, is capable of operating in a pipelined way. To reduce the hardware complexity of permutation network significantly, a streaming architecture is adopted. Simulation is performed to verify the correctness of permutation network and implementation results are given.</description><subject>Digital video broadcasting</subject><subject>iterative Cooley-Tukey FFT</subject><subject>permutation network</subject><subject>streaming architecture</subject><issn>2162-7541</issn><issn>2162-755X</issn><isbn>9781612841922</isbn><isbn>1612841929</isbn><isbn>9781612841915</isbn><isbn>9781612841939</isbn><isbn>1612841910</isbn><isbn>1612841937</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVkN9KwzAchaNTcMw-wW7yAq35Jc2_y1qsDoa7WC-8G1mWSLVrStIhvr2iQ_DcfBw-OBcHoSWQAoDou2q7qjfPBSUAhQAuGWUXKNNSgQCqStDAL9GcgqC55Pxl9s9RevXnSrhBWUpv5DtCKCnEHN1XeHTxeJrM1IUBD276CPEd-xCxDYPvXk_R7HuHzXDAyZr-pzRNi8cYrEspxHSLrr3pk8vOXKC2eWjrp3y9eVzV1TrvNJlyRS3njLC9p1o6Dl6TgybCOqsVU85SC1IKYmnJvfeWE66NsQqUMkp77dkCLX9nO-fcbozd0cTP3fkQ9gX1HU_w</recordid><startdate>201110</startdate><enddate>201110</enddate><creator>Shuai Chen</creator><creator>Jialin Chen</creator><creator>Kanwen Wang</creator><creator>Wei Cao</creator><creator>Lingli Wang</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201110</creationdate><title>A permutation network for configurable and scalable FFT processors</title><author>Shuai Chen ; Jialin Chen ; Kanwen Wang ; Wei Cao ; Lingli Wang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-82c55303bf297e51f90d906cec9838ec2c17760c245fffc5059aac8188a89f9f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Digital video broadcasting</topic><topic>iterative Cooley-Tukey FFT</topic><topic>permutation network</topic><topic>streaming architecture</topic><toplevel>online_resources</toplevel><creatorcontrib>Shuai Chen</creatorcontrib><creatorcontrib>Jialin Chen</creatorcontrib><creatorcontrib>Kanwen Wang</creatorcontrib><creatorcontrib>Wei Cao</creatorcontrib><creatorcontrib>Lingli Wang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shuai Chen</au><au>Jialin Chen</au><au>Kanwen Wang</au><au>Wei Cao</au><au>Lingli Wang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A permutation network for configurable and scalable FFT processors</atitle><btitle>2011 9th IEEE International Conference on ASIC</btitle><stitle>ASICON</stitle><date>2011-10</date><risdate>2011</risdate><spage>787</spage><epage>790</epage><pages>787-790</pages><issn>2162-7541</issn><eissn>2162-755X</eissn><isbn>9781612841922</isbn><isbn>1612841929</isbn><eisbn>9781612841915</eisbn><eisbn>9781612841939</eisbn><eisbn>1612841910</eisbn><eisbn>1612841937</eisbn><abstract>In this paper, we propose a permutation network, a key component for configurable and scalable FFT processors, to perform a set of permutations on streaming data. The method presented for constructing such permutation networks applies to permutations that can be represented as linear mappings on the bit representation of data location. The permutation network, consisting of several independent RAM blocks and two interconnection networks, is capable of operating in a pipelined way. To reduce the hardware complexity of permutation network significantly, a streaming architecture is adopted. Simulation is performed to verify the correctness of permutation network and implementation results are given.</abstract><pub>IEEE</pub><doi>10.1109/ASICON.2011.6157323</doi><tpages>4</tpages></addata></record>
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subjects Digital video broadcasting
iterative Cooley-Tukey FFT
permutation network
streaming architecture
title A permutation network for configurable and scalable FFT processors
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T23%3A58%3A03IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20permutation%20network%20for%20configurable%20and%20scalable%20FFT%20processors&rft.btitle=2011%209th%20IEEE%20International%20Conference%20on%20ASIC&rft.au=Shuai%20Chen&rft.date=2011-10&rft.spage=787&rft.epage=790&rft.pages=787-790&rft.issn=2162-7541&rft.eissn=2162-755X&rft.isbn=9781612841922&rft.isbn_list=1612841929&rft_id=info:doi/10.1109/ASICON.2011.6157323&rft_dat=%3Cieee_6IE%3E6157323%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9781612841915&rft.eisbn_list=9781612841939&rft.eisbn_list=1612841910&rft.eisbn_list=1612841937&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6157323&rfr_iscdi=true