Latency-aware mapping for 3D NoC using rank-based multi-objective genetic algorithm

Three dimensional network-on-chip (3D NoC) has been suggested as a potential alternative to solve insurmountable problems in 2D field such as global wire length and packet latency for many years. And the mapping problem plays an import role in 3D NoC design which will have a great influence on overa...

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Bibliographische Detailangaben
Hauptverfasser: Jiawen Wang, Li Li, Hongbing Pan, Shuzhuan He, Rong Zhang
Format: Tagungsbericht
Sprache:eng
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