O(mn) Time Algorithm for Optimal Buffer Insertion of Nets With m Sinks
Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O ( mn ) time algorithm for optimal buffer insertion, where m is the number of sinks and n is the number of buffer positions. When m is small, our algorithm is a significant improvement over the...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2012-03, Vol.31 (3), p.437-441 |
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creator | Li, Zhuo Zhou, Ying Shi, Weiping |
description | Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O ( mn ) time algorithm for optimal buffer insertion, where m is the number of sinks and n is the number of buffer positions. When m is small, our algorithm is a significant improvement over the recent O ( n log 2 n ) time algorithm by Shi and Li, and the O ( n 2 ) time algorithm of van Ginneken. For b buffer types, our algorithms runs in O ( b 2 n + bmn ) time, an improvement of the recent O ( bn 2 ) algorithm by Li and Shi. The improvement is made possible by an innovative linked list that can perform addition of a wire, addition of a buffer in amortized O (1) time, and smart design of pointers. We then present the extension of our algorithm for the buffer cost minimization problem, which improves the previous best algorithm. On industrial test cases, the new algorithms is faster than previous best algorithms by an order of magnitude. |
doi_str_mv | 10.1109/TCAD.2011.2174639 |
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In this paper, we give a simple O ( mn ) time algorithm for optimal buffer insertion, where m is the number of sinks and n is the number of buffer positions. When m is small, our algorithm is a significant improvement over the recent O ( n log 2 n ) time algorithm by Shi and Li, and the O ( n 2 ) time algorithm of van Ginneken. For b buffer types, our algorithms runs in O ( b 2 n + bmn ) time, an improvement of the recent O ( bn 2 ) algorithm by Li and Shi. The improvement is made possible by an innovative linked list that can perform addition of a wire, addition of a buffer in amortized O (1) time, and smart design of pointers. We then present the extension of our algorithm for the buffer cost minimization problem, which improves the previous best algorithm. On industrial test cases, the new algorithms is faster than previous best algorithms by an order of magnitude.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.2011.2174639</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>IEEE</publisher><subject>Algorithm design and analysis ; Bismuth ; Buffer insertion ; Capacitance ; Complexity theory ; data structure ; Delay ; Elmore delay ; interconnect ; Resistance ; routing ; Wires</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 2012-03, Vol.31 (3), p.437-441</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c265t-8966a44cc197cccae31a13618bd6a3b211093c2b996a1f9e5ac64baf0273229a3</citedby><cites>FETCH-LOGICAL-c265t-8966a44cc197cccae31a13618bd6a3b211093c2b996a1f9e5ac64baf0273229a3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6152778$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6152778$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Li, Zhuo</creatorcontrib><creatorcontrib>Zhou, Ying</creatorcontrib><creatorcontrib>Shi, Weiping</creatorcontrib><title>O(mn) Time Algorithm for Optimal Buffer Insertion of Nets With m Sinks</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O ( mn ) time algorithm for optimal buffer insertion, where m is the number of sinks and n is the number of buffer positions. When m is small, our algorithm is a significant improvement over the recent O ( n log 2 n ) time algorithm by Shi and Li, and the O ( n 2 ) time algorithm of van Ginneken. For b buffer types, our algorithms runs in O ( b 2 n + bmn ) time, an improvement of the recent O ( bn 2 ) algorithm by Li and Shi. The improvement is made possible by an innovative linked list that can perform addition of a wire, addition of a buffer in amortized O (1) time, and smart design of pointers. We then present the extension of our algorithm for the buffer cost minimization problem, which improves the previous best algorithm. On industrial test cases, the new algorithms is faster than previous best algorithms by an order of magnitude.</description><subject>Algorithm design and analysis</subject><subject>Bismuth</subject><subject>Buffer insertion</subject><subject>Capacitance</subject><subject>Complexity theory</subject><subject>data structure</subject><subject>Delay</subject><subject>Elmore delay</subject><subject>interconnect</subject><subject>Resistance</subject><subject>routing</subject><subject>Wires</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kD1PwzAURS0EEqHwAxCLRxgS_GzHjscQKFSqyEAQY-QYGwL5qOww8O9J1IrpLfdc3XcQugSSABB1WxX5fUIJQEJBcsHUEYpAMRlzSOEYRYTKLCZEklN0FsIXIcBTqiK0Lq_74QZXbW9x3n2Mvp0-e-xGj8vd1Pa6w3c_zlmPN0OwfmrHAY8OP9sp4Lc5inv80g7f4RydON0Fe3G4K_S6fqiKp3hbPm6KfBsbKtIpzpQQmnNjQEljjLYMNDABWfMuNGvo8goztFFKaHDKptoI3mg3r2eUKs1WCPa9xo8heOvqnZ9X-t8aSL3Q9SKiXkTUBxEzc7VnWmvtf15ASqXM2B9lDVhT</recordid><startdate>201203</startdate><enddate>201203</enddate><creator>Li, Zhuo</creator><creator>Zhou, Ying</creator><creator>Shi, Weiping</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201203</creationdate><title>O(mn) Time Algorithm for Optimal Buffer Insertion of Nets With m Sinks</title><author>Li, Zhuo ; Zhou, Ying ; Shi, Weiping</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c265t-8966a44cc197cccae31a13618bd6a3b211093c2b996a1f9e5ac64baf0273229a3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Algorithm design and analysis</topic><topic>Bismuth</topic><topic>Buffer insertion</topic><topic>Capacitance</topic><topic>Complexity theory</topic><topic>data structure</topic><topic>Delay</topic><topic>Elmore delay</topic><topic>interconnect</topic><topic>Resistance</topic><topic>routing</topic><topic>Wires</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Li, Zhuo</creatorcontrib><creatorcontrib>Zhou, Ying</creatorcontrib><creatorcontrib>Shi, Weiping</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Li, Zhuo</au><au>Zhou, Ying</au><au>Shi, Weiping</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>O(mn) Time Algorithm for Optimal Buffer Insertion of Nets With m Sinks</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>2012-03</date><risdate>2012</risdate><volume>31</volume><issue>3</issue><spage>437</spage><epage>441</epage><pages>437-441</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O ( mn ) time algorithm for optimal buffer insertion, where m is the number of sinks and n is the number of buffer positions. When m is small, our algorithm is a significant improvement over the recent O ( n log 2 n ) time algorithm by Shi and Li, and the O ( n 2 ) time algorithm of van Ginneken. For b buffer types, our algorithms runs in O ( b 2 n + bmn ) time, an improvement of the recent O ( bn 2 ) algorithm by Li and Shi. The improvement is made possible by an innovative linked list that can perform addition of a wire, addition of a buffer in amortized O (1) time, and smart design of pointers. We then present the extension of our algorithm for the buffer cost minimization problem, which improves the previous best algorithm. On industrial test cases, the new algorithms is faster than previous best algorithms by an order of magnitude.</abstract><pub>IEEE</pub><doi>10.1109/TCAD.2011.2174639</doi><tpages>5</tpages></addata></record> |
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subjects | Algorithm design and analysis Bismuth Buffer insertion Capacitance Complexity theory data structure Delay Elmore delay interconnect Resistance routing Wires |
title | O(mn) Time Algorithm for Optimal Buffer Insertion of Nets With m Sinks |
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