Embedded interconnect and electrical isolation for high-aspect-ratio, SOI inertial instruments

A new technique for providing both electrical isolation and embedded interconnect to SOI-based, single crystal silicon, inertial sensors is described. This technology allows fabrication of high-aspect-ratio, in-plane, capacitive sensors with improved sensitivity suitable for integration with on-chip...

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Hauptverfasser: Brosnihan, T.J., Bustillo, J.M., Pisano, A.P., Howe, R.T.
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creator Brosnihan, T.J.
Bustillo, J.M.
Pisano, A.P.
Howe, R.T.
description A new technique for providing both electrical isolation and embedded interconnect to SOI-based, single crystal silicon, inertial sensors is described. This technology allows fabrication of high-aspect-ratio, in-plane, capacitive sensors with improved sensitivity suitable for integration with on-chip electronics. Various 45 /spl mu/m-tall MEMS devices with electrical isolation from the silicon substrate and embedded interconnect have been fabricated and tested. The embedded interconnect and electrical isolation enable truly integrated high-aspect-ratio MEMS sensors, and alternatively simplifies packaging in monolithic two-chip approaches. By extending the demonstrated technique to aluminum interconnect, only two additional masks are required to convert a CMOS process into a fully integrated MEMS technology at the incremental cost of an SOI starting material.
doi_str_mv 10.1109/SENSOR.1997.613732
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identifier ISBN: 9780780338296
ispartof Proceedings of International Solid State Sensors and Actuators Conference (Transducers '97), 1997, Vol.1, p.637-640 vol.1
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Aluminum
Capacitive sensors
Electronics packaging
Fabrication
Isolation technology
Microelectromechanical devices
Micromechanical devices
Sensor phenomena and characterization
Silicon
Testing
title Embedded interconnect and electrical isolation for high-aspect-ratio, SOI inertial instruments
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