Improved high-k/metal gate lifetime via improved SILC understanding and mitigation

For the first time, we identify key factors impacting SILC through a comprehensive reliability study for high-k/metal gate nMOSFET with several mitigating process changes. SILC is increasingly important because higher SILC can distort time-dependent dielectric breakdown (TDDB) lifetime extraction. W...

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Hauptverfasser: Minseok Jo, Chang Young Kang, Huang, Jeff, Bersuker, G., Young, C., Kirsch, P., Jammy, R.
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creator Minseok Jo
Chang Young Kang
Huang, Jeff
Bersuker, G.
Young, C.
Kirsch, P.
Jammy, R.
description For the first time, we identify key factors impacting SILC through a comprehensive reliability study for high-k/metal gate nMOSFET with several mitigating process changes. SILC is increasingly important because higher SILC can distort time-dependent dielectric breakdown (TDDB) lifetime extraction. We find that high-k bulk layer and interfacial layer both contribute to SILC characteristics. We propose a direction to SILC reduction, thereby improving device lifetime.
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Electric breakdown
Hafnium oxide
High K dielectric materials
Logic gates
Stress
title Improved high-k/metal gate lifetime via improved SILC understanding and mitigation
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