Improved high-k/metal gate lifetime via improved SILC understanding and mitigation

For the first time, we identify key factors impacting SILC through a comprehensive reliability study for high-k/metal gate nMOSFET with several mitigating process changes. SILC is increasingly important because higher SILC can distort time-dependent dielectric breakdown (TDDB) lifetime extraction. We find that high-k bulk layer and interfacial layer both contribute to SILC characteristics. We propose a direction to SILC reduction, thereby improving device lifetime.