Square topology: A novel topology for NoCs
This paper proposes square topology as an efficient topology for Network-on-Chips (NoCs). Although the proposed topology imposes the cost near to that of the mesh topology, the proposed topology 1) provides lower diameter for NoC, 2) offers better performance under uniform and hotspot traffic patter...
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creator | Doroud, H. Ghorbanian, M. Sabbaghi-Nadooshan, R. |
description | This paper proposes square topology as an efficient topology for Network-on-Chips (NoCs). Although the proposed topology imposes the cost near to that of the mesh topology, the proposed topology 1) provides lower diameter for NoC, 2) offers better performance under uniform and hotspot traffic pattern. In our simulation, the proposed square topology had better performance in comparison to other topologies specifically meshes and spidergon topology. |
doi_str_mv | 10.1109/NORCHP.2011.6126731 |
format | Conference Proceeding |
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Although the proposed topology imposes the cost near to that of the mesh topology, the proposed topology 1) provides lower diameter for NoC, 2) offers better performance under uniform and hotspot traffic pattern. In our simulation, the proposed square topology had better performance in comparison to other topologies specifically meshes and spidergon topology.</description><identifier>ISBN: 9781457705144</identifier><identifier>ISBN: 1457705141</identifier><identifier>EISBN: 9781457705151</identifier><identifier>EISBN: 9781457705168</identifier><identifier>EISBN: 1457705168</identifier><identifier>EISBN: 145770515X</identifier><identifier>DOI: 10.1109/NORCHP.2011.6126731</identifier><language>eng</language><publisher>IEEE</publisher><subject>Network topology ; Network-on-Chip ; power ; Routing ; Square topology ; Switches ; System-on-a-chip ; Topology</subject><ispartof>2011 NORCHIP, 2011, p.1-4</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6126731$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6126731$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Doroud, H.</creatorcontrib><creatorcontrib>Ghorbanian, M.</creatorcontrib><creatorcontrib>Sabbaghi-Nadooshan, R.</creatorcontrib><title>Square topology: A novel topology for NoCs</title><title>2011 NORCHIP</title><addtitle>NORCHP</addtitle><description>This paper proposes square topology as an efficient topology for Network-on-Chips (NoCs). Although the proposed topology imposes the cost near to that of the mesh topology, the proposed topology 1) provides lower diameter for NoC, 2) offers better performance under uniform and hotspot traffic pattern. In our simulation, the proposed square topology had better performance in comparison to other topologies specifically meshes and spidergon topology.</description><subject>Network topology</subject><subject>Network-on-Chip</subject><subject>power</subject><subject>Routing</subject><subject>Square topology</subject><subject>Switches</subject><subject>System-on-a-chip</subject><subject>Topology</subject><isbn>9781457705144</isbn><isbn>1457705141</isbn><isbn>9781457705151</isbn><isbn>9781457705168</isbn><isbn>1457705168</isbn><isbn>145770515X</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVj81Kw0AYRaeIoNQ8QTezFhK_b_7HXQlqC6WVtvsymZ8SiU5NqtC3V7AIvZvLuYsDl5AJQoUI9mG5Wtez14oBYqWQKc1xRAqrDQqpNUiUeHXBQtyQYhje4DcKDLfqltxvPr9cH-kxH3KX96dHOqUf-Tt2_wtNuafLXA935Dq5bojFucdk-_y0rWflYvUyr6eLsrVwLG2KXPIgnZbgkxHBC-0EMMHRSJsaD0w7Z4K2IGxoGqUD9z5aJhMa5IqPyeRP28YYd4e-fXf9aXc-yH8ARuZCng</recordid><startdate>201111</startdate><enddate>201111</enddate><creator>Doroud, H.</creator><creator>Ghorbanian, M.</creator><creator>Sabbaghi-Nadooshan, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201111</creationdate><title>Square topology: A novel topology for NoCs</title><author>Doroud, H. ; Ghorbanian, M. ; Sabbaghi-Nadooshan, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-9fe353d5a750cf84dc47a402431859fbc027aa8d79049dbb67d3cce925f181363</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Network topology</topic><topic>Network-on-Chip</topic><topic>power</topic><topic>Routing</topic><topic>Square topology</topic><topic>Switches</topic><topic>System-on-a-chip</topic><topic>Topology</topic><toplevel>online_resources</toplevel><creatorcontrib>Doroud, H.</creatorcontrib><creatorcontrib>Ghorbanian, M.</creatorcontrib><creatorcontrib>Sabbaghi-Nadooshan, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Doroud, H.</au><au>Ghorbanian, M.</au><au>Sabbaghi-Nadooshan, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Square topology: A novel topology for NoCs</atitle><btitle>2011 NORCHIP</btitle><stitle>NORCHP</stitle><date>2011-11</date><risdate>2011</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><isbn>9781457705144</isbn><isbn>1457705141</isbn><eisbn>9781457705151</eisbn><eisbn>9781457705168</eisbn><eisbn>1457705168</eisbn><eisbn>145770515X</eisbn><abstract>This paper proposes square topology as an efficient topology for Network-on-Chips (NoCs). Although the proposed topology imposes the cost near to that of the mesh topology, the proposed topology 1) provides lower diameter for NoC, 2) offers better performance under uniform and hotspot traffic pattern. In our simulation, the proposed square topology had better performance in comparison to other topologies specifically meshes and spidergon topology.</abstract><pub>IEEE</pub><doi>10.1109/NORCHP.2011.6126731</doi><tpages>4</tpages></addata></record> |
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language | eng |
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subjects | Network topology Network-on-Chip power Routing Square topology Switches System-on-a-chip Topology |
title | Square topology: A novel topology for NoCs |
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