FPGA design for image processing using a GUI of a web-based VHDL Code Generator
The aim of our web-based VHDL Code Generator, named DiaHDL, is, to translate a component diagram to synthesizable VHDL code [1][2]. In this live demonstration we present the special Graphical User Interface (GUI) of this web- based tool that allows the user to select digital components, customize th...
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| creator | Schumann, Thomas Susanti, Anita Ratna Dewi |
| description | The aim of our web-based VHDL Code Generator, named DiaHDL, is, to translate a component diagram to synthesizable VHDL code [1][2]. In this live demonstration we present the special Graphical User Interface (GUI) of this web- based tool that allows the user to select digital components, customize their parameters und generate the VHDL code. This is done for an FPGA design for image processing, a JPEG encoder. We show the complete design flow from component entry to bit stream generation for programming a Xilinx FPGA device, using the proposed GUI of DiaHDL tool together with Xilinx ISE tool, a standard HDL synthesis tool. |
| doi_str_mv | 10.1109/VCIP.2011.6115963 |
| format | Conference Proceeding |
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| identifier | ISBN: 9781457713217 |
| ispartof | 2011 Visual Communications and Image Processing (VCIP), 2011, p.1-1 |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Electrical engineering Field programmable gate arrays Generators Graphical user interfaces Hardware Hardware design languages Image processing |
| title | FPGA design for image processing using a GUI of a web-based VHDL Code Generator |
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