Massively parallel programming models used as hardware description languages: The OpenCL case

The problem of automatically generating hardware modules from high level application representations has been at the forefront of EDA research during the last few years. In this paper, we introduce a methodology to automatically synthesize hardware accelerators from OpenCL applications. OpenCL is a...

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Bibliographische Detailangaben

Hauptverfasser:	Owaida, M., Bellas, N., Antonopoulos, C. D., Daloukas, K., Antoniadis, C.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computational modeling Electronic Design Automation Embedded Systems Field programmable gate arrays FPGA Hardware Kernel OpenCL Optimization Pipelines Reconfigurable Computing Synchronization
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