Design of a Subthreshold-Supply Bootstrapped CMOS Inverter Based on an Active Leakage-Current Reduction Technique

This brief presents a bootstrapped CMOS inverter operated with a subthreshold power supply. In addition to improving the driving ability, a large gate voltage swing from - V DD to 2 V DD suppresses the subthreshold leakage current. As compared with other reported works, the proposed bootstrapped inv...

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Veröffentlicht in:	IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2012-01, Vol.59 (1), p.55-59
Hauptverfasser:	Ho, Yingchieh, Chang, Chiachi, Su, Chauchin
Format:	Artikel
Sprache:	eng
Schlagworte:	Boosting Bootstrapped circuit Chips CMOS CMOS integrated circuits Delay Design engineering Electric potential Inverters Leakage current leakage-current reduction low-voltage circuit Monte Carlo methods MOS devices Reduction Semiconductor device measurement Studies subthreshold circuit
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