On-Chip Noise Sensor for Integrated Circuit Susceptibility Investigations
With the growing concerns about electromagnetic compatibility of integrated circuits, the need for accurate prediction tools and models to reduce risks of noncompliance becomes critical for circuit designers. However, an on-chip characterization of noise is still necessary for model validation and d...
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Veröffentlicht in: | IEEE transactions on instrumentation and measurement 2012-03, Vol.61 (3), p.696-707 |
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container_title | IEEE transactions on instrumentation and measurement |
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creator | Dhia, S. Boyer, A. Vrignon, B. Deobarro, M. Dinh, T. V. |
description | With the growing concerns about electromagnetic compatibility of integrated circuits, the need for accurate prediction tools and models to reduce risks of noncompliance becomes critical for circuit designers. However, an on-chip characterization of noise is still necessary for model validation and design optimization. Although different on-chip measurement solutions have been proposed for emission issue characterization, no on-chip measurement methods have been proposed to address the susceptibility issues. This paper presents an on-chip noise sensor dedicated to the study of circuit susceptibility to electromagnetic interferences. A demonstration of the sensor measurement performances and benefits is proposed through a study of the susceptibility of a digital core to conducted interferences. Sensor measurements ensure a better characterization of actual coupling of interferences within the circuit and a diagnosis of failure origins. |
doi_str_mv | 10.1109/TIM.2011.2172116 |
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Sensor measurements ensure a better characterization of actual coupling of interferences within the circuit and a diagnosis of failure origins.</description><identifier>ISSN: 0018-9456</identifier><identifier>EISSN: 1557-9662</identifier><identifier>DOI: 10.1109/TIM.2011.2172116</identifier><identifier>CODEN: IEIMAO</identifier><language>eng</language><publisher>IEEE</publisher><subject>Attenuators ; Computer architecture ; Electromagnetic compatibility (EMC) ; Electronics ; Engineering Sciences ; integrated circuits (ICs) ; interference measurement ; Microprocessors ; Noise ; on-chip sensor ; susceptibility testing ; System-on-a-chip ; Voltage measurement</subject><ispartof>IEEE transactions on instrumentation and measurement, 2012-03, Vol.61 (3), p.696-707</ispartof><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c405t-21672f8aa491214dd89b0162eb40ecc7f751bd4caaa7350e7f959475913adabf3</citedby><cites>FETCH-LOGICAL-c405t-21672f8aa491214dd89b0162eb40ecc7f751bd4caaa7350e7f959475913adabf3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6088009$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>230,314,778,782,794,883,27911,27912,54745</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6088009$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttps://hal.science/hal-00668627$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Dhia, S.</creatorcontrib><creatorcontrib>Boyer, A.</creatorcontrib><creatorcontrib>Vrignon, B.</creatorcontrib><creatorcontrib>Deobarro, M.</creatorcontrib><creatorcontrib>Dinh, T. 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A demonstration of the sensor measurement performances and benefits is proposed through a study of the susceptibility of a digital core to conducted interferences. Sensor measurements ensure a better characterization of actual coupling of interferences within the circuit and a diagnosis of failure origins.</description><subject>Attenuators</subject><subject>Computer architecture</subject><subject>Electromagnetic compatibility (EMC)</subject><subject>Electronics</subject><subject>Engineering Sciences</subject><subject>integrated circuits (ICs)</subject><subject>interference measurement</subject><subject>Microprocessors</subject><subject>Noise</subject><subject>on-chip sensor</subject><subject>susceptibility testing</subject><subject>System-on-a-chip</subject><subject>Voltage measurement</subject><issn>0018-9456</issn><issn>1557-9662</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kD1rwzAQQEVpoWnavdDFawend7I-rDGYtjGkzZB0FrIsJyqpHSwlkH9fh4QMx8Hx3g2PkGeECSKot1X5NaGAOKEoKaK4ISPkXKZKCHpLRgCYp4pxcU8eQvgFACmYHJFy0abFxu-S784HlyxdG7o-aYYp2-jWvYmuTgrf272PyXIfrNtFX_mtj8eBOLgQ_dpE37Xhkdw1Zhvc02WPyc_H-6qYpfPFZ1lM56llwGNKUUja5MYwhRRZXeeqAhTUVQyctbKRHKuaWWOMzDg42SiumOQKM1ObqsnG5PX8d2O2etf7P9MfdWe8nk3n-nQDECIXVB5wYOHM2r4LoXfNVUDQp2x6yKZP2fQl26C8nBXvnLviAvIcQGX_nalomQ</recordid><startdate>201203</startdate><enddate>201203</enddate><creator>Dhia, S.</creator><creator>Boyer, A.</creator><creator>Vrignon, B.</creator><creator>Deobarro, M.</creator><creator>Dinh, T. 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V.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>On-Chip Noise Sensor for Integrated Circuit Susceptibility Investigations</atitle><jtitle>IEEE transactions on instrumentation and measurement</jtitle><stitle>TIM</stitle><date>2012-03</date><risdate>2012</risdate><volume>61</volume><issue>3</issue><spage>696</spage><epage>707</epage><pages>696-707</pages><issn>0018-9456</issn><eissn>1557-9662</eissn><coden>IEIMAO</coden><abstract>With the growing concerns about electromagnetic compatibility of integrated circuits, the need for accurate prediction tools and models to reduce risks of noncompliance becomes critical for circuit designers. However, an on-chip characterization of noise is still necessary for model validation and design optimization. Although different on-chip measurement solutions have been proposed for emission issue characterization, no on-chip measurement methods have been proposed to address the susceptibility issues. This paper presents an on-chip noise sensor dedicated to the study of circuit susceptibility to electromagnetic interferences. A demonstration of the sensor measurement performances and benefits is proposed through a study of the susceptibility of a digital core to conducted interferences. Sensor measurements ensure a better characterization of actual coupling of interferences within the circuit and a diagnosis of failure origins.</abstract><pub>IEEE</pub><doi>10.1109/TIM.2011.2172116</doi><tpages>12</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Attenuators Computer architecture Electromagnetic compatibility (EMC) Electronics Engineering Sciences integrated circuits (ICs) interference measurement Microprocessors Noise on-chip sensor susceptibility testing System-on-a-chip Voltage measurement |
title | On-Chip Noise Sensor for Integrated Circuit Susceptibility Investigations |
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