Vertical organic thin film transistor to achieve sub ten micron channel length devices
Channel length of a top contact Organic Thin Film Transistor (OTFT) is usually defined during its fabrication by optical lithography or shadow masking during metal deposition process. Realizing short channel (sub-ten micron channel length) transistors by lithography requires costly equipments. On th...
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creator | Khan, A. R. Yadav, S. C. Chauhan, S. S. Kumar, B. Kaushik, B. K. Negi, Y. S. Iyer, S. S. K. |
description | Channel length of a top contact Organic Thin Film Transistor (OTFT) is usually defined during its fabrication by optical lithography or shadow masking during metal deposition process. Realizing short channel (sub-ten micron channel length) transistors by lithography requires costly equipments. On the other hand, it is extremely challenging to achieve short channel transistors using low cost shadow mask process. As an economical method for achieving short channel devices, the transistors can be built vertically, where the channel gets defined in the vertical part of the device. This paper shows that vertical channel top contact OTFT is successfully realized on Si substrate with SiO 2 as gate insulator and pentacene as organic semiconductor. The active channel is defined on the vertical edge of a wide trench etched in the substrate. This helps in creating the device with channel lengths less than ten microns, much smaller than what could be typically achieved with use of shadow masks. The sub-ten micron vertical OTFTs is electrically characterized. The characteristics and transistor performance parameters is estimated and compared with the transistors of more standardized horizontal top contact OTFTs. |
doi_str_mv | 10.1109/ICCCT.2011.6075205 |
format | Conference Proceeding |
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This paper shows that vertical channel top contact OTFT is successfully realized on Si substrate with SiO 2 as gate insulator and pentacene as organic semiconductor. The active channel is defined on the vertical edge of a wide trench etched in the substrate. This helps in creating the device with channel lengths less than ten microns, much smaller than what could be typically achieved with use of shadow masks. The sub-ten micron vertical OTFTs is electrically characterized. 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As an economical method for achieving short channel devices, the transistors can be built vertically, where the channel gets defined in the vertical part of the device. This paper shows that vertical channel top contact OTFT is successfully realized on Si substrate with SiO 2 as gate insulator and pentacene as organic semiconductor. The active channel is defined on the vertical edge of a wide trench etched in the substrate. This helps in creating the device with channel lengths less than ten microns, much smaller than what could be typically achieved with use of shadow masks. The sub-ten micron vertical OTFTs is electrically characterized. The characteristics and transistor performance parameters is estimated and compared with the transistors of more standardized horizontal top contact OTFTs.</description><subject>Gold</subject><subject>Logic gates</subject><subject>Organic thin film transistors</subject><subject>Organic Thin Film Transistors (OTFTs)</subject><subject>Pentacene</subject><subject>Poly-Thiophene (PT)</subject><subject>Radio Frequency Identification (RFID)</subject><subject>Substrates</subject><subject>Thin Film Transistors (TFTs)</subject><isbn>1457713853</isbn><isbn>9781457713859</isbn><isbn>1457713861</isbn><isbn>9781457713842</isbn><isbn>1457713845</isbn><isbn>9781457713866</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkMtKxDAYRiMiqOO8gG7yAq35m0uTpRQvAwNuymyHTPpnGmlTSeKAb6_ggN_mcDZn8RFyD6wGYOZx03VdXzcMoFaslQ2TF-QWhGxb4FrB5b9Ifk3WOX-w3ymltWxvyG6HqQRnJ7qko43B0TKGSH2YZlqSjTnksiRaFmrdGPCENH8daMFI5-DSEqkbbYw40QnjsYx0wFNwmO_IlbdTxvWZK9K_PPfdW7V9f910T9sqGFYq451mZgApuNdDK_igQTlnBVdMSKmV99wy422L3IP2QljDGg4HDl40WvAVefjLBkTcf6Yw2_S9P9_AfwDz3lFv</recordid><startdate>201109</startdate><enddate>201109</enddate><creator>Khan, A. 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K.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Khan, A. R.</au><au>Yadav, S. C.</au><au>Chauhan, S. S.</au><au>Kumar, B.</au><au>Kaushik, B. K.</au><au>Negi, Y. S.</au><au>Iyer, S. S. K.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Vertical organic thin film transistor to achieve sub ten micron channel length devices</atitle><btitle>2011 2nd International Conference on Computer and Communication Technology (ICCCT-2011)</btitle><stitle>ICCCT</stitle><date>2011-09</date><risdate>2011</risdate><spage>197</spage><epage>202</epage><pages>197-202</pages><isbn>1457713853</isbn><isbn>9781457713859</isbn><eisbn>1457713861</eisbn><eisbn>9781457713842</eisbn><eisbn>1457713845</eisbn><eisbn>9781457713866</eisbn><abstract>Channel length of a top contact Organic Thin Film Transistor (OTFT) is usually defined during its fabrication by optical lithography or shadow masking during metal deposition process. Realizing short channel (sub-ten micron channel length) transistors by lithography requires costly equipments. On the other hand, it is extremely challenging to achieve short channel transistors using low cost shadow mask process. As an economical method for achieving short channel devices, the transistors can be built vertically, where the channel gets defined in the vertical part of the device. This paper shows that vertical channel top contact OTFT is successfully realized on Si substrate with SiO 2 as gate insulator and pentacene as organic semiconductor. The active channel is defined on the vertical edge of a wide trench etched in the substrate. This helps in creating the device with channel lengths less than ten microns, much smaller than what could be typically achieved with use of shadow masks. The sub-ten micron vertical OTFTs is electrically characterized. The characteristics and transistor performance parameters is estimated and compared with the transistors of more standardized horizontal top contact OTFTs.</abstract><pub>IEEE</pub><doi>10.1109/ICCCT.2011.6075205</doi><tpages>6</tpages></addata></record> |
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subjects | Gold Logic gates Organic thin film transistors Organic Thin Film Transistors (OTFTs) Pentacene Poly-Thiophene (PT) Radio Frequency Identification (RFID) Substrates Thin Film Transistors (TFTs) |
title | Vertical organic thin film transistor to achieve sub ten micron channel length devices |
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