Floating-Gate Corner-Enhanced Poly-to-Poly Tunneling in Split-Gate Flash Memory Cells

The poly-to-poly tunneling characteristics in the third-generation SuperFlash memory cell have been analyzed. It has been demonstrated that, even without a sharp floating-gate (FG) tip, the cell still demonstrates the main features of the erase process from previous SuperFlash generations, namely, c...

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Veröffentlicht in:	IEEE transactions on electron devices 2012-01, Vol.59 (1), p.5-11
Hauptverfasser:	Tkachev, Y., Xian Liu, Kotov, A.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Arrays Charge carrier processes Current measurement Design. Technologies. Operation analysis. Testing Electric potential Electronics erasable programmable read-only memory (EPROM) Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Magnetic and optical mass memories Modulation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Storage and reproduction of information Tunneling Voltage measurement
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creator	Tkachev, Y. Xian Liu Kotov, A.
description	The poly-to-poly tunneling characteristics in the third-generation SuperFlash memory cell have been analyzed. It has been demonstrated that, even without a sharp floating-gate (FG) tip, the cell still demonstrates the main features of the erase process from previous SuperFlash generations, namely, corner (tip)-enhanced tunneling, asymmetry of the tunneling voltage in forward and reverse directions, strong localization of the tunneling process, and effective suppression of anode hole injection. Furthermore, a new method for measuring the tunneling voltage on a regular FG cell is described. The reliability aspects of corner-enhanced tunneling in the SuperFlash cell are also discussed.
doi_str_mv	10.1109/TED.2011.2171346
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It has been demonstrated that, even without a sharp floating-gate (FG) tip, the cell still demonstrates the main features of the erase process from previous SuperFlash generations, namely, corner (tip)-enhanced tunneling, asymmetry of the tunneling voltage in forward and reverse directions, strong localization of the tunneling process, and effective suppression of anode hole injection. Furthermore, a new method for measuring the tunneling voltage on a regular FG cell is described. The reliability aspects of corner-enhanced tunneling in the SuperFlash cell are also discussed.</description><subject>Applied sciences</subject><subject>Arrays</subject><subject>Charge carrier processes</subject><subject>Current measurement</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electric potential</subject><subject>Electronics</subject><subject>erasable programmable read-only memory (EPROM)</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Magnetic and optical mass memories</subject><subject>Modulation</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Solid state devices</topic><topic>Storage and reproduction of information</topic><topic>Tunneling</topic><topic>Voltage measurement</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tkachev, Y.</creatorcontrib><creatorcontrib>Xian Liu</creatorcontrib><creatorcontrib>Kotov, A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tkachev, Y.</au><au>Xian Liu</au><au>Kotov, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Floating-Gate Corner-Enhanced Poly-to-Poly Tunneling in Split-Gate Flash Memory Cells</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2012-01</date><risdate>2012</risdate><volume>59</volume><issue>1</issue><spage>5</spage><epage>11</epage><pages>5-11</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The poly-to-poly tunneling characteristics in the third-generation SuperFlash memory cell have been analyzed. It has been demonstrated that, even without a sharp floating-gate (FG) tip, the cell still demonstrates the main features of the erase process from previous SuperFlash generations, namely, corner (tip)-enhanced tunneling, asymmetry of the tunneling voltage in forward and reverse directions, strong localization of the tunneling process, and effective suppression of anode hole injection. Furthermore, a new method for measuring the tunneling voltage on a regular FG cell is described. The reliability aspects of corner-enhanced tunneling in the SuperFlash cell are also discussed.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2011.2171346</doi><tpages>7</tpages></addata></record>
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subjects	Applied sciences Arrays Charge carrier processes Current measurement Design. Technologies. Operation analysis. Testing Electric potential Electronics erasable programmable read-only memory (EPROM) Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Magnetic and optical mass memories Modulation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Storage and reproduction of information Tunneling Voltage measurement
title	Floating-Gate Corner-Enhanced Poly-to-Poly Tunneling in Split-Gate Flash Memory Cells
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