55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter
This 55nm CMOS 12-bit current-steering DAC directly powered by the single-inductor dual-output (SIDO) switching DC-DC converter with the dynamic voltage scaling (DVS) technique improves the DAC's power efficiency by 25% and achieves 65.34dB SFDR. The proposed 3S method, including separating, sp...
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| creator | Tzu-Chi Huang Wen-Shen Chou Yu-Huei Lee Yao-Yi Yang Ke-Horng Chen Yung-Chow Peng Fu-Lung Hsueh |
| description | This 55nm CMOS 12-bit current-steering DAC directly powered by the single-inductor dual-output (SIDO) switching DC-DC converter with the dynamic voltage scaling (DVS) technique improves the DAC's power efficiency by 25% and achieves 65.34dB SFDR. The proposed 3S method, including separating, splitting, and shifting, effectively reduces the current mismatching within 0.2% and suppresses the switching noise interference from the SIDO converter. The 12-bit DAC and SIDO module achieve compatible performance compare to the tradition method and has the benefit of area and energy efficiency. |
| doi_str_mv | 10.1109/ESSCIRC.2011.6044987 |
| format | Conference Proceeding |
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The proposed 3S method, including separating, splitting, and shifting, effectively reduces the current mismatching within 0.2% and suppresses the switching noise interference from the SIDO converter. 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The proposed 3S method, including separating, splitting, and shifting, effectively reduces the current mismatching within 0.2% and suppresses the switching noise interference from the SIDO converter. The 12-bit DAC and SIDO module achieve compatible performance compare to the tradition method and has the benefit of area and energy efficiency.</description><subject>CMOS integrated circuits</subject><subject>Current measurement</subject><subject>DC-DC converter</subject><subject>Digital to analog converter (DAC)</subject><subject>Dynamic voltage scaling (DVS)</subject><subject>Inductors</subject><subject>Noise</subject><subject>Single-inductor dual-output (SIDO)</subject><subject>Solid state circuits</subject><subject>Switches</subject><subject>Voltage control</subject><issn>1930-8833</issn><issn>2643-1319</issn><isbn>9781457707032</isbn><isbn>1457707039</isbn><isbn>1457707047</isbn><isbn>9781457707025</isbn><isbn>9781457707049</isbn><isbn>1457707020</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkMtOwkAARcdXIiBfoItZwmJwXu10lqagkEBILHFLhnmUMaXFdorB__B_JRFj7uIuTnJucgF4IHhECJaPkyxLZ6_piGJCRjHmXCbiAnQJj4TAAnNxCTo05gwRRuQV6EuR_DFGr0GHSIZRkjB2C7pN845xTGJOO-A7isodTBfLDBKKNj5AGuHF9Asan_ugChQqpEpVVDnUVXmwdbA1_PRhC82xVDuv4aEqgsotbLQqfJnDwfgtG8Jg9bb0H62FYVtXbb6FzQkWFvnStDpUNTTtyV61Yd8GOMhm4-Xwf-EO3DhVNLZ_7h5YPU9W6RTNly-z9GmOvMQBWaaIS2RMlGaUC-Ii4wxJpKA8NsLFjkXS6lNUrDaJk3ZjpSFUc-6MECZiPXD_q_XW2vW-9jtVH9fnd9kPX4BsPw</recordid><startdate>201109</startdate><enddate>201109</enddate><creator>Tzu-Chi Huang</creator><creator>Wen-Shen Chou</creator><creator>Yu-Huei Lee</creator><creator>Yao-Yi Yang</creator><creator>Ke-Horng Chen</creator><creator>Yung-Chow Peng</creator><creator>Fu-Lung Hsueh</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201109</creationdate><title>55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter</title><author>Tzu-Chi Huang ; Wen-Shen Chou ; Yu-Huei Lee ; Yao-Yi Yang ; Ke-Horng Chen ; Yung-Chow Peng ; Fu-Lung Hsueh</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-e3a1f8961ac32471f5dfd1897246d7f6f359ececea6ab8f9ebe9d12c44fd77d53</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CMOS integrated circuits</topic><topic>Current measurement</topic><topic>DC-DC converter</topic><topic>Digital to analog converter (DAC)</topic><topic>Dynamic voltage scaling (DVS)</topic><topic>Inductors</topic><topic>Noise</topic><topic>Single-inductor dual-output (SIDO)</topic><topic>Solid state circuits</topic><topic>Switches</topic><topic>Voltage control</topic><toplevel>online_resources</toplevel><creatorcontrib>Tzu-Chi Huang</creatorcontrib><creatorcontrib>Wen-Shen Chou</creatorcontrib><creatorcontrib>Yu-Huei Lee</creatorcontrib><creatorcontrib>Yao-Yi Yang</creatorcontrib><creatorcontrib>Ke-Horng Chen</creatorcontrib><creatorcontrib>Yung-Chow Peng</creatorcontrib><creatorcontrib>Fu-Lung Hsueh</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tzu-Chi Huang</au><au>Wen-Shen Chou</au><au>Yu-Huei Lee</au><au>Yao-Yi Yang</au><au>Ke-Horng Chen</au><au>Yung-Chow Peng</au><au>Fu-Lung Hsueh</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter</atitle><btitle>2011 Proceedings of the ESSCIRC (ESSCIRC)</btitle><stitle>ESSCIRC</stitle><date>2011-09</date><risdate>2011</risdate><spage>383</spage><epage>386</epage><pages>383-386</pages><issn>1930-8833</issn><eissn>2643-1319</eissn><isbn>9781457707032</isbn><isbn>1457707039</isbn><eisbn>1457707047</eisbn><eisbn>9781457707025</eisbn><eisbn>9781457707049</eisbn><eisbn>1457707020</eisbn><abstract>This 55nm CMOS 12-bit current-steering DAC directly powered by the single-inductor dual-output (SIDO) switching DC-DC converter with the dynamic voltage scaling (DVS) technique improves the DAC's power efficiency by 25% and achieves 65.34dB SFDR. The proposed 3S method, including separating, splitting, and shifting, effectively reduces the current mismatching within 0.2% and suppresses the switching noise interference from the SIDO converter. The 12-bit DAC and SIDO module achieve compatible performance compare to the tradition method and has the benefit of area and energy efficiency.</abstract><pub>IEEE</pub><doi>10.1109/ESSCIRC.2011.6044987</doi><tpages>4</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1930-8833 |
| ispartof | 2011 Proceedings of the ESSCIRC (ESSCIRC), 2011, p.383-386 |
| issn | 1930-8833 2643-1319 |
| language | eng |
| recordid | cdi_ieee_primary_6044987 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | CMOS integrated circuits Current measurement DC-DC converter Digital to analog converter (DAC) Dynamic voltage scaling (DVS) Inductors Noise Single-inductor dual-output (SIDO) Solid state circuits Switches Voltage control |
| title | 55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter |
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