Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits
This paper proposes a soft error characterization methodology to analyze multiple faults caused by single-event-induced charge sharing in standard-cell based ASIC designs. Fault injection campaigns have been executed using data provided by placement analysis as well as a pulse width modeling through...
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Veröffentlicht in: | IEEE transactions on nuclear science 2011-12, Vol.58 (6), p.2768-2775 |
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creator | Pagliarini, S. Kastensmidt, F. Entrena, L. Lindoso, A. Millan, E. S. |
description | This paper proposes a soft error characterization methodology to analyze multiple faults caused by single-event-induced charge sharing in standard-cell based ASIC designs. Fault injection campaigns have been executed using data provided by placement analysis as well as a pulse width modeling through electrical simulation. Experimental results demonstrate that the error rate can be largely overestimated if placement is not considered. |
doi_str_mv | 10.1109/TNS.2011.2168239 |
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S.</creator><creatorcontrib>Pagliarini, S. ; Kastensmidt, F. ; Entrena, L. ; Lindoso, A. ; Millan, E. S.</creatorcontrib><description>This paper proposes a soft error characterization methodology to analyze multiple faults caused by single-event-induced charge sharing in standard-cell based ASIC designs. Fault injection campaigns have been executed using data provided by placement analysis as well as a pulse width modeling through electrical simulation. Experimental results demonstrate that the error rate can be largely overestimated if placement is not considered.</description><identifier>ISSN: 0018-9499</identifier><identifier>EISSN: 1558-1578</identifier><identifier>DOI: 10.1109/TNS.2011.2168239</identifier><identifier>CODEN: IETNAE</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Application specific integrated circuits ; Charge ; Circuit faults ; Circuits ; Computer simulation ; Design engineering ; Electric charge ; Error analysis ; Fault injection ; Faults ; Integrated circuit layout ; Integrated circuit modeling ; Logic gates ; Placement ; single-event-induced charge sharing ; soft error rate (SER) ; Soft errors ; Transient analysis</subject><ispartof>IEEE transactions on nuclear science, 2011-12, Vol.58 (6), p.2768-2775</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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S.</creatorcontrib><title>Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits</title><title>IEEE transactions on nuclear science</title><addtitle>TNS</addtitle><description>This paper proposes a soft error characterization methodology to analyze multiple faults caused by single-event-induced charge sharing in standard-cell based ASIC designs. Fault injection campaigns have been executed using data provided by placement analysis as well as a pulse width modeling through electrical simulation. Experimental results demonstrate that the error rate can be largely overestimated if placement is not considered.</description><subject>Application specific integrated circuits</subject><subject>Charge</subject><subject>Circuit faults</subject><subject>Circuits</subject><subject>Computer simulation</subject><subject>Design engineering</subject><subject>Electric charge</subject><subject>Error analysis</subject><subject>Fault injection</subject><subject>Faults</subject><subject>Integrated circuit layout</subject><subject>Integrated circuit modeling</subject><subject>Logic gates</subject><subject>Placement</subject><subject>single-event-induced charge sharing</subject><subject>soft error rate (SER)</subject><subject>Soft errors</subject><subject>Transient analysis</subject><issn>0018-9499</issn><issn>1558-1578</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkL1PwzAQxS0EEqWwI7FYTCwpdmzH8VhFBSpVdGiZLce5tKnyUewEUf56XLVi4JanO_3e6e4hdE_JhFKintfvq0lMKJ3ENEljpi7QiAqRRlTI9BKNCKFppLhS1-jG-11ouSBihJbT1tSHn6rd4H4LeN7sje1xV-JVGNUQzb6g7aN5WwwWCpxtjdsAXgU5OqoWZ12zr-EbZ5WzQ9X7W3RVmtrD3VnH6ONlts7eosXydZ5NF5FlqeojKWLLOJUktipPOCuViUHlBTWKyRhsOA4kgYJbbmROZaJC5VQpxmwSbGyMnk579677HMD3uqm8hbo2LXSD15RQksqUKRnQx3_orhtceNtrRTmXQggWIHKCrOu8d1Dqvasa4w5hkz4GrEPA-hiwPgccLA8nSwUAf3hCePiQsF84kHSS</recordid><startdate>201112</startdate><enddate>201112</enddate><creator>Pagliarini, S.</creator><creator>Kastensmidt, F.</creator><creator>Entrena, L.</creator><creator>Lindoso, A.</creator><creator>Millan, E. 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S.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits</atitle><jtitle>IEEE transactions on nuclear science</jtitle><stitle>TNS</stitle><date>2011-12</date><risdate>2011</risdate><volume>58</volume><issue>6</issue><spage>2768</spage><epage>2775</epage><pages>2768-2775</pages><issn>0018-9499</issn><eissn>1558-1578</eissn><coden>IETNAE</coden><abstract>This paper proposes a soft error characterization methodology to analyze multiple faults caused by single-event-induced charge sharing in standard-cell based ASIC designs. Fault injection campaigns have been executed using data provided by placement analysis as well as a pulse width modeling through electrical simulation. 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subjects | Application specific integrated circuits Charge Circuit faults Circuits Computer simulation Design engineering Electric charge Error analysis Fault injection Faults Integrated circuit layout Integrated circuit modeling Logic gates Placement single-event-induced charge sharing soft error rate (SER) Soft errors Transient analysis |
title | Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits |
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