A signal integrity enhancement technique for high speed test systems
Signal integrity degradation at high frequencies affects test results and increases the yield loss of integrated circuits. Parasitic effects and electromagnetic coupling due to transmission lines degrade the integrity of test signals and undermine the accuracy of the measurement results. A new signa...
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| creator | Kandalaft, N. Rashidzadeh, R. Ahmadi, M. |
| description | Signal integrity degradation at high frequencies affects test results and increases the yield loss of integrated circuits. Parasitic effects and electromagnetic coupling due to transmission lines degrade the integrity of test signals and undermine the accuracy of the measurement results. A new signal integrity enhancement technique is presented in this paper to compensate the signal loss. A Proportional Integrator-Differentiator (PID) circuit is implemented as an overshoot generator to negate the undesired effects of transmission lines. Simulation results at 1GHz show that the proposed method can improve the rise and fall time by orders of magnitude, and increase the eye-opening by more than 40%. |
| doi_str_mv | 10.1109/CCECE.2011.6030674 |
| format | Conference Proceeding |
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Simulation results at 1GHz show that the proposed method can improve the rise and fall time by orders of magnitude, and increase the eye-opening by more than 40%.</description><subject>Automatic test equipment</subject><subject>Degradation</subject><subject>Device under test</subject><subject>Integrated circuit modeling</subject><subject>Lead</subject><subject>Power cables</subject><subject>Proportional-Integrator-differentiator (PID)</subject><subject>RLC circuits</subject><subject>signal integrity</subject><subject>transmission line</subject><subject>Transmission line measurements</subject><issn>0840-7789</issn><issn>2576-7046</issn><isbn>9781424497881</isbn><isbn>1424497884</isbn><isbn>9781424497874</isbn><isbn>1424497892</isbn><isbn>1424497876</isbn><isbn>9781424497898</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVkLlOw0AURYdNwoT8ADTzAzbvjWdzGRmzSJFooI4m9rM9KDbBMxT-eyyRhuoUR_cUl7E7hAwRioeyrMoqE4CYachBG3nG1oWxKIWUC408Z4lQRqcGpL745yxesgSshNQYW1yzmxA-AUBaLRP2uOHBd6M7cD9G6iYfZ05j78aaBhojj1T3o__-Id5-Tbz3Xc_DkahZRIg8zCHSEG7ZVesOgdYnrtjHU_VevqTbt-fXcrNNPRoVU6NqZ2lfkDNWaVIoNDXCFejy1iEqJHJQS9HstWpAkKJl4ERdgDOoweYrdv_X9US0O05-cNO8Ox2S_wIjH1Cl</recordid><startdate>201105</startdate><enddate>201105</enddate><creator>Kandalaft, N.</creator><creator>Rashidzadeh, R.</creator><creator>Ahmadi, M.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201105</creationdate><title>A signal integrity enhancement technique for high speed test systems</title><author>Kandalaft, N. ; Rashidzadeh, R. ; Ahmadi, M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-75ca8eb9ea7856e5126ed2a91a3fa1151eea0c42db65d02e5e5caa2c90a716083</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Automatic test equipment</topic><topic>Degradation</topic><topic>Device under test</topic><topic>Integrated circuit modeling</topic><topic>Lead</topic><topic>Power cables</topic><topic>Proportional-Integrator-differentiator (PID)</topic><topic>RLC circuits</topic><topic>signal integrity</topic><topic>transmission line</topic><topic>Transmission line measurements</topic><toplevel>online_resources</toplevel><creatorcontrib>Kandalaft, N.</creatorcontrib><creatorcontrib>Rashidzadeh, R.</creatorcontrib><creatorcontrib>Ahmadi, M.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kandalaft, N.</au><au>Rashidzadeh, R.</au><au>Ahmadi, M.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A signal integrity enhancement technique for high speed test systems</atitle><btitle>2011 24th Canadian Conference on Electrical and Computer Engineering(CCECE)</btitle><stitle>CCECE</stitle><date>2011-05</date><risdate>2011</risdate><spage>001300</spage><epage>001303</epage><pages>001300-001303</pages><issn>0840-7789</issn><eissn>2576-7046</eissn><isbn>9781424497881</isbn><isbn>1424497884</isbn><eisbn>9781424497874</eisbn><eisbn>1424497892</eisbn><eisbn>1424497876</eisbn><eisbn>9781424497898</eisbn><abstract>Signal integrity degradation at high frequencies affects test results and increases the yield loss of integrated circuits. Parasitic effects and electromagnetic coupling due to transmission lines degrade the integrity of test signals and undermine the accuracy of the measurement results. A new signal integrity enhancement technique is presented in this paper to compensate the signal loss. A Proportional Integrator-Differentiator (PID) circuit is implemented as an overshoot generator to negate the undesired effects of transmission lines. Simulation results at 1GHz show that the proposed method can improve the rise and fall time by orders of magnitude, and increase the eye-opening by more than 40%.</abstract><pub>IEEE</pub><doi>10.1109/CCECE.2011.6030674</doi><tpages>4</tpages></addata></record> |
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| identifier | ISSN: 0840-7789 |
| ispartof | 2011 24th Canadian Conference on Electrical and Computer Engineering(CCECE), 2011, p.001300-001303 |
| issn | 0840-7789 2576-7046 |
| language | eng |
| recordid | cdi_ieee_primary_6030674 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Automatic test equipment Degradation Device under test Integrated circuit modeling Lead Power cables Proportional-Integrator-differentiator (PID) RLC circuits signal integrity transmission line Transmission line measurements |
| title | A signal integrity enhancement technique for high speed test systems |
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