Acceleration of mincut partitioning using hardware CAD accelerator TP5000
This paper presents a new approach of data pipelining for mincut partitioning acceleration using a parallel computer. We choose the hardware CAD accelerator TP5000 to implement our approach. We obtain a speed improvement of 20 to 25 times as fast as a SPARCStation-10 by using 10 processors in the TP...
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creator | Sano, M. Shimogori, S. Hirose, F. |
description | This paper presents a new approach of data pipelining for mincut partitioning acceleration using a parallel computer. We choose the hardware CAD accelerator TP5000 to implement our approach. We obtain a speed improvement of 20 to 25 times as fast as a SPARCStation-10 by using 10 processors in the TP5000. |
doi_str_mv | 10.1109/ASPDAC.1997.600059 |
format | Conference Proceeding |
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We obtain a speed improvement of 20 to 25 times as fast as a SPARCStation-10 by using 10 processors in the TP5000.</description><subject>Acceleration</subject><subject>Concurrent computing</subject><subject>Design automation</subject><subject>Hardware</subject><subject>Laboratories</subject><subject>Partitioning algorithms</subject><subject>Pipeline processing</subject><subject>Signal design</subject><subject>Tin</subject><subject>Very large scale integration</subject><isbn>9780780336629</isbn><isbn>0780336623</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1997</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNp9Ts0KwjAYK4igaF9gp76A86u123osm6K3gbuPMjut7I92Q3x7N9SrEBJISAhCHgWfUhBbeUkTGftUiNAPAICLGcIijGAEY0GwEwuEnXuMEew58Igt0VkWha60Vb1pG9KWpDZNMfSkU7Y3k2eaGxncxHdlr09lNYllQtSv1lqSpXxcXKN5qSqn8VdXyDsesvi0MVrrvLOmVvaVf36xv-EbIt070g</recordid><startdate>1997</startdate><enddate>1997</enddate><creator>Sano, M.</creator><creator>Shimogori, S.</creator><creator>Hirose, F.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1997</creationdate><title>Acceleration of mincut partitioning using hardware CAD accelerator TP5000</title><author>Sano, M. ; Shimogori, S. ; Hirose, F.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_6000593</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1997</creationdate><topic>Acceleration</topic><topic>Concurrent computing</topic><topic>Design automation</topic><topic>Hardware</topic><topic>Laboratories</topic><topic>Partitioning algorithms</topic><topic>Pipeline processing</topic><topic>Signal design</topic><topic>Tin</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Sano, M.</creatorcontrib><creatorcontrib>Shimogori, S.</creatorcontrib><creatorcontrib>Hirose, F.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sano, M.</au><au>Shimogori, S.</au><au>Hirose, F.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Acceleration of mincut partitioning using hardware CAD accelerator TP5000</atitle><btitle>Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference</btitle><stitle>ASPDAC</stitle><date>1997</date><risdate>1997</risdate><spage>61</spage><epage>64</epage><pages>61-64</pages><isbn>9780780336629</isbn><isbn>0780336623</isbn><abstract>This paper presents a new approach of data pipelining for mincut partitioning acceleration using a parallel computer. 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identifier | ISBN: 9780780336629 |
ispartof | Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference, 1997, p.61-64 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Acceleration Concurrent computing Design automation Hardware Laboratories Partitioning algorithms Pipeline processing Signal design Tin Very large scale integration |
title | Acceleration of mincut partitioning using hardware CAD accelerator TP5000 |
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