An FPGA hardware architecture of Nilsimsa fingerprinting algorithm
Nilsimsa algorithm is a very effective spam fingerprinting technique. This spam fingerprinting algorithm is formulated for software implementation. In this paper, we present an FPGA hardware architecture of the modified form of Nilsimsa algorithm which has similar accurate with the original software...
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creator | Monemi, A. Mohamed, M. A. Marsono, M. N. |
description | Nilsimsa algorithm is a very effective spam fingerprinting technique. This spam fingerprinting algorithm is formulated for software implementation. In this paper, we present an FPGA hardware architecture of the modified form of Nilsimsa algorithm which has similar accurate with the original software-targeted algorithm. The modification results in hardware resources reduction and execution time speed up. The implemented algorithm works at 123 MHz frequency and has a throughput of 1 byte per 2 clock cycles (494 Megabits per second). Our system also needs an extra 512 clock cycles after receiving the entire of the message to compute the Nilsimsa fingerprint. This means the minimum time for computing the fingerprint of a message with the size of 10 Kbytes is 167 μ s, which is equal to 5988 emails per second. For 100 MHz clock, our proposed architecture is 1400 times faster compared to implementation on 32-bit general-purpose embedded processor, and 24 times faster than the implementation on a modern CPU running on 2.64 GHz clock. |
doi_str_mv | 10.1109/INECCE.2011.5953862 |
format | Conference Proceeding |
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A. ; Marsono, M. N.</creator><creatorcontrib>Monemi, A. ; Mohamed, M. A. ; Marsono, M. N.</creatorcontrib><description>Nilsimsa algorithm is a very effective spam fingerprinting technique. This spam fingerprinting algorithm is formulated for software implementation. In this paper, we present an FPGA hardware architecture of the modified form of Nilsimsa algorithm which has similar accurate with the original software-targeted algorithm. The modification results in hardware resources reduction and execution time speed up. The implemented algorithm works at 123 MHz frequency and has a throughput of 1 byte per 2 clock cycles (494 Megabits per second). Our system also needs an extra 512 clock cycles after receiving the entire of the message to compute the Nilsimsa fingerprint. This means the minimum time for computing the fingerprint of a message with the size of 10 Kbytes is 167 μ s, which is equal to 5988 emails per second. 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This means the minimum time for computing the fingerprint of a message with the size of 10 Kbytes is 167 μ s, which is equal to 5988 emails per second. For 100 MHz clock, our proposed architecture is 1400 times faster compared to implementation on 32-bit general-purpose embedded processor, and 24 times faster than the implementation on a modern CPU running on 2.64 GHz clock.</description><subject>Clocks</subject><subject>Electronic mail</subject><subject>Fingerprinting</subject><subject>Hardware</subject><subject>hardware implementation</subject><subject>Nilsimsa</subject><subject>Radiation detectors</subject><subject>Random access memory</subject><subject>Software</subject><subject>Software algorithms</subject><subject>spam detection</subject><isbn>9781612842295</isbn><isbn>1612842291</isbn><isbn>1612842305</isbn><isbn>9781612842288</isbn><isbn>9781612842301</isbn><isbn>1612842283</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tOwzAURI0QElDyBd34BxJsx9ePZYj6kqrCovvqxnEaoyRFThDi74lEZjNzNqMZQtacZZwz-3o4bcpykwnGeQYWcqPEHXnmigsjRc7gniRWm4WFhUeSjOMnm6WU5dY-kbdioNuPXUFbjPUPRk8xujZM3k3fM9waegrdGPoRaROGq49fMQzTnCh211sMU9u_kIcGu9Eni6_Iebs5l_v0-L47lMUxDZZNKaCvUXowwlYWhRESHQcpuPMOpWoYKOO0BIe80tpBDkxXXoGVDk3tdb4i6__a4L2_zDN6jL-X5XX-B6CFS5k</recordid><startdate>201106</startdate><enddate>201106</enddate><creator>Monemi, A.</creator><creator>Mohamed, M. A.</creator><creator>Marsono, M. N.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201106</creationdate><title>An FPGA hardware architecture of Nilsimsa fingerprinting algorithm</title><author>Monemi, A. ; Mohamed, M. A. ; Marsono, M. N.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-5aeda4e5829b9a2824ac15421ceca46f0568c745ca1b77c53507be6594ca8de73</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Clocks</topic><topic>Electronic mail</topic><topic>Fingerprinting</topic><topic>Hardware</topic><topic>hardware implementation</topic><topic>Nilsimsa</topic><topic>Radiation detectors</topic><topic>Random access memory</topic><topic>Software</topic><topic>Software algorithms</topic><topic>spam detection</topic><toplevel>online_resources</toplevel><creatorcontrib>Monemi, A.</creatorcontrib><creatorcontrib>Mohamed, M. A.</creatorcontrib><creatorcontrib>Marsono, M. N.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Monemi, A.</au><au>Mohamed, M. A.</au><au>Marsono, M. N.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>An FPGA hardware architecture of Nilsimsa fingerprinting algorithm</atitle><btitle>International Conference on Electrical, Control and Computer Engineering 2011 (InECCE)</btitle><stitle>INECCE</stitle><date>2011-06</date><risdate>2011</risdate><spage>124</spage><epage>129</epage><pages>124-129</pages><isbn>9781612842295</isbn><isbn>1612842291</isbn><eisbn>1612842305</eisbn><eisbn>9781612842288</eisbn><eisbn>9781612842301</eisbn><eisbn>1612842283</eisbn><abstract>Nilsimsa algorithm is a very effective spam fingerprinting technique. This spam fingerprinting algorithm is formulated for software implementation. In this paper, we present an FPGA hardware architecture of the modified form of Nilsimsa algorithm which has similar accurate with the original software-targeted algorithm. The modification results in hardware resources reduction and execution time speed up. The implemented algorithm works at 123 MHz frequency and has a throughput of 1 byte per 2 clock cycles (494 Megabits per second). Our system also needs an extra 512 clock cycles after receiving the entire of the message to compute the Nilsimsa fingerprint. This means the minimum time for computing the fingerprint of a message with the size of 10 Kbytes is 167 μ s, which is equal to 5988 emails per second. For 100 MHz clock, our proposed architecture is 1400 times faster compared to implementation on 32-bit general-purpose embedded processor, and 24 times faster than the implementation on a modern CPU running on 2.64 GHz clock.</abstract><pub>IEEE</pub><doi>10.1109/INECCE.2011.5953862</doi><tpages>6</tpages></addata></record> |
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ispartof | International Conference on Electrical, Control and Computer Engineering 2011 (InECCE), 2011, p.124-129 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Clocks Electronic mail Fingerprinting Hardware hardware implementation Nilsimsa Radiation detectors Random access memory Software Software algorithms spam detection |
title | An FPGA hardware architecture of Nilsimsa fingerprinting algorithm |
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