A novel fast canonical-signed-digit conversion technique for multiplication
Fast multiplication can be achieved by using canonical signed digit (CSD) to speed-up computations. Conversion to CSD is needed when the multiplier is not known a priori. In this work, a novel approach for converting an unsigned binary number or two's complement number to its CSD form from leas...
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| creator | Rui Guo DeBrunner, Linda S. |
| description | Fast multiplication can be achieved by using canonical signed digit (CSD) to speed-up computations. Conversion to CSD is needed when the multiplier is not known a priori. In this work, a novel approach for converting an unsigned binary number or two's complement number to its CSD form from least significant bit to most significant bit, (right-to-left), is presented. Comparison shows that our algorithm is faster and requires less area than existing CSD conversion algorithms. |
| doi_str_mv | 10.1109/ICASSP.2011.5946812 |
| format | Conference Proceeding |
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Conversion to CSD is needed when the multiplier is not known a priori. In this work, a novel approach for converting an unsigned binary number or two's complement number to its CSD form from least significant bit to most significant bit, (right-to-left), is presented. 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Conversion to CSD is needed when the multiplier is not known a priori. In this work, a novel approach for converting an unsigned binary number or two's complement number to its CSD form from least significant bit to most significant bit, (right-to-left), is presented. Comparison shows that our algorithm is faster and requires less area than existing CSD conversion algorithms.</description><subject>Booth's Recoding</subject><subject>canonical-signed-digit (CSD)</subject><subject>Computers</subject><subject>Delay</subject><subject>Digital signal processing</subject><subject>Hardware</subject><subject>Logic gates</subject><subject>minimum-signeddigit (MSD)</subject><subject>Propagation delay</subject><subject>redundant number representation</subject><issn>1520-6149</issn><issn>2379-190X</issn><isbn>9781457705380</isbn><isbn>1457705389</isbn><isbn>1457705397</isbn><isbn>9781457705373</isbn><isbn>9781457705397</isbn><isbn>1457705370</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1UNtKAzEUjDew1n5BX_YHUnOyyZ6cx1K0igWFKvhWstmkRrbZurst-PcuWOdlYIYZmGFsCmIGIOjuaTFfr19nUgDMNKnCgDxjN6A0otA54TkbyRyJA4mPCzYhNP-eEZdsBFoKXoCiazbpui8xoJCImkbseZ6l5ujrLNiuz5xNTYrO1ryL2-QrXsVtHOQmHX3bxSZlvXefKX4ffBaaNtsd6j7u6yHRD-Ytuwq27vzkxGP2_nD_tnjkq5flsGDFI6DuuQUpXIDSC4HKF8pZci7HSoYyWEXaekHaEWlAUwVhsCyDU4gFGCCSJh-z6V9v9N5v9m3c2fZnc_ol_wVdIlOt</recordid><startdate>201105</startdate><enddate>201105</enddate><creator>Rui Guo</creator><creator>DeBrunner, Linda S.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201105</creationdate><title>A novel fast canonical-signed-digit conversion technique for multiplication</title><author>Rui Guo ; DeBrunner, Linda S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-a120cf1be0074e64ca9cc37d2fbfa495ae095c995178df087bbfc477618199283</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Booth's Recoding</topic><topic>canonical-signed-digit (CSD)</topic><topic>Computers</topic><topic>Delay</topic><topic>Digital signal processing</topic><topic>Hardware</topic><topic>Logic gates</topic><topic>minimum-signeddigit (MSD)</topic><topic>Propagation delay</topic><topic>redundant number representation</topic><toplevel>online_resources</toplevel><creatorcontrib>Rui Guo</creatorcontrib><creatorcontrib>DeBrunner, Linda S.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rui Guo</au><au>DeBrunner, Linda S.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A novel fast canonical-signed-digit conversion technique for multiplication</atitle><btitle>2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)</btitle><stitle>ICASSP</stitle><date>2011-05</date><risdate>2011</risdate><spage>1637</spage><epage>1640</epage><pages>1637-1640</pages><issn>1520-6149</issn><eissn>2379-190X</eissn><isbn>9781457705380</isbn><isbn>1457705389</isbn><eisbn>1457705397</eisbn><eisbn>9781457705373</eisbn><eisbn>9781457705397</eisbn><eisbn>1457705370</eisbn><abstract>Fast multiplication can be achieved by using canonical signed digit (CSD) to speed-up computations. Conversion to CSD is needed when the multiplier is not known a priori. In this work, a novel approach for converting an unsigned binary number or two's complement number to its CSD form from least significant bit to most significant bit, (right-to-left), is presented. Comparison shows that our algorithm is faster and requires less area than existing CSD conversion algorithms.</abstract><pub>IEEE</pub><doi>10.1109/ICASSP.2011.5946812</doi><tpages>4</tpages></addata></record> |
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| issn | 1520-6149 2379-190X |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Booth's Recoding canonical-signed-digit (CSD) Computers Delay Digital signal processing Hardware Logic gates minimum-signeddigit (MSD) Propagation delay redundant number representation |
| title | A novel fast canonical-signed-digit conversion technique for multiplication |
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