Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration
In this paper the effect of a vapor phase based silylation process on patterned test structures using ULK based ILD's was investigated. It was found that the resistance to capacitance (RC) behavior can be improved. This improvement was found to be scalable, meaning with decreasing metal pitch t...
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creator | Thomas, O. Schaller, M. Gerlich, L. Fischer, D. Leppack, S. Bartsch, C. Schulz, S. E. |
description | In this paper the effect of a vapor phase based silylation process on patterned test structures using ULK based ILD's was investigated. It was found that the resistance to capacitance (RC) behavior can be improved. This improvement was found to be scalable, meaning with decreasing metal pitch the RC improvement increases. The silylation process provides in addition a decrease of the leakage current and was found to have adequate defectivity. As the process is feasible for production and the improvement of the electrical properties increases with smaller feature size, it can be assumed that extra costs of the restoration process will be paid out for future technology nodes, if ULK as an ILD is used. |
doi_str_mv | 10.1109/IITC.2011.5940329 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5940329</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5940329</ieee_id><sourcerecordid>5940329</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-99eb126d126444d55735f54ca47b0dee2c6686f5fce52e24938fe82f5c090c1f3</originalsourceid><addsrcrecordid>eNo9UMtOAjEUra9ERD7AuOkPDPY50y7NiDoJiRtM2JFSbkm1zJC2aPh7RkUWN_e87llchO4oGVNK9EPTzOoxI5SOpRaEM32GbqiQVUUkofNzNGBckaLkXF2gka7Uv8fV5clj82s0SumDkL6H9FwNUDcJYHP01gS8jd0WYt5jv-nhF2ygzQl3Du9CjgaH7rv4xM30Ce-Sb9fY4OTDPpjsu_bn1kJK2IFJfhkAuy6eRN9mWMff4C26ciYkGB33EL0_T2b1azF9e2nqx2nhaSVzoTUsKStX_QghVlJWXDoprBHVkqwAmC1LVTrpLEgGTGiuHCjmpCWaWOr4EN3_9XoAWGyj35i4Xxx_xw8iQmBh</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Thomas, O. ; Schaller, M. ; Gerlich, L. ; Fischer, D. ; Leppack, S. ; Bartsch, C. ; Schulz, S. E.</creator><creatorcontrib>Thomas, O. ; Schaller, M. ; Gerlich, L. ; Fischer, D. ; Leppack, S. ; Bartsch, C. ; Schulz, S. E.</creatorcontrib><description>In this paper the effect of a vapor phase based silylation process on patterned test structures using ULK based ILD's was investigated. It was found that the resistance to capacitance (RC) behavior can be improved. This improvement was found to be scalable, meaning with decreasing metal pitch the RC improvement increases. The silylation process provides in addition a decrease of the leakage current and was found to have adequate defectivity. As the process is feasible for production and the improvement of the electrical properties increases with smaller feature size, it can be assumed that extra costs of the restoration process will be paid out for future technology nodes, if ULK as an ILD is used.</description><identifier>ISSN: 2380-632X</identifier><identifier>ISBN: 9781457705038</identifier><identifier>ISBN: 1457705036</identifier><identifier>EISSN: 2380-6338</identifier><identifier>EISBN: 145770501X</identifier><identifier>EISBN: 9781457705021</identifier><identifier>EISBN: 9781457705014</identifier><identifier>EISBN: 1457705028</identifier><identifier>DOI: 10.1109/IITC.2011.5940329</identifier><language>eng</language><publisher>IEEE</publisher><subject>Carbon ; Chemicals ; Maintenance engineering ; Metals ; Plasmas ; Surface treatment</subject><ispartof>2011 IEEE International Interconnect Technology Conference, 2011, p.1-3</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5940329$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>310,311,781,785,790,791,2059,27930,54925</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5940329$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Thomas, O.</creatorcontrib><creatorcontrib>Schaller, M.</creatorcontrib><creatorcontrib>Gerlich, L.</creatorcontrib><creatorcontrib>Fischer, D.</creatorcontrib><creatorcontrib>Leppack, S.</creatorcontrib><creatorcontrib>Bartsch, C.</creatorcontrib><creatorcontrib>Schulz, S. E.</creatorcontrib><title>Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration</title><title>2011 IEEE International Interconnect Technology Conference</title><addtitle>IITC</addtitle><description>In this paper the effect of a vapor phase based silylation process on patterned test structures using ULK based ILD's was investigated. It was found that the resistance to capacitance (RC) behavior can be improved. This improvement was found to be scalable, meaning with decreasing metal pitch the RC improvement increases. The silylation process provides in addition a decrease of the leakage current and was found to have adequate defectivity. As the process is feasible for production and the improvement of the electrical properties increases with smaller feature size, it can be assumed that extra costs of the restoration process will be paid out for future technology nodes, if ULK as an ILD is used.</description><subject>Carbon</subject><subject>Chemicals</subject><subject>Maintenance engineering</subject><subject>Metals</subject><subject>Plasmas</subject><subject>Surface treatment</subject><issn>2380-632X</issn><issn>2380-6338</issn><isbn>9781457705038</isbn><isbn>1457705036</isbn><isbn>145770501X</isbn><isbn>9781457705021</isbn><isbn>9781457705014</isbn><isbn>1457705028</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo9UMtOAjEUra9ERD7AuOkPDPY50y7NiDoJiRtM2JFSbkm1zJC2aPh7RkUWN_e87llchO4oGVNK9EPTzOoxI5SOpRaEM32GbqiQVUUkofNzNGBckaLkXF2gka7Uv8fV5clj82s0SumDkL6H9FwNUDcJYHP01gS8jd0WYt5jv-nhF2ygzQl3Du9CjgaH7rv4xM30Ce-Sb9fY4OTDPpjsu_bn1kJK2IFJfhkAuy6eRN9mWMff4C26ciYkGB33EL0_T2b1azF9e2nqx2nhaSVzoTUsKStX_QghVlJWXDoprBHVkqwAmC1LVTrpLEgGTGiuHCjmpCWaWOr4EN3_9XoAWGyj35i4Xxx_xw8iQmBh</recordid><startdate>201105</startdate><enddate>201105</enddate><creator>Thomas, O.</creator><creator>Schaller, M.</creator><creator>Gerlich, L.</creator><creator>Fischer, D.</creator><creator>Leppack, S.</creator><creator>Bartsch, C.</creator><creator>Schulz, S. E.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201105</creationdate><title>Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration</title><author>Thomas, O. ; Schaller, M. ; Gerlich, L. ; Fischer, D. ; Leppack, S. ; Bartsch, C. ; Schulz, S. E.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-99eb126d126444d55735f54ca47b0dee2c6686f5fce52e24938fe82f5c090c1f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Carbon</topic><topic>Chemicals</topic><topic>Maintenance engineering</topic><topic>Metals</topic><topic>Plasmas</topic><topic>Surface treatment</topic><toplevel>online_resources</toplevel><creatorcontrib>Thomas, O.</creatorcontrib><creatorcontrib>Schaller, M.</creatorcontrib><creatorcontrib>Gerlich, L.</creatorcontrib><creatorcontrib>Fischer, D.</creatorcontrib><creatorcontrib>Leppack, S.</creatorcontrib><creatorcontrib>Bartsch, C.</creatorcontrib><creatorcontrib>Schulz, S. E.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Thomas, O.</au><au>Schaller, M.</au><au>Gerlich, L.</au><au>Fischer, D.</au><au>Leppack, S.</au><au>Bartsch, C.</au><au>Schulz, S. E.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration</atitle><btitle>2011 IEEE International Interconnect Technology Conference</btitle><stitle>IITC</stitle><date>2011-05</date><risdate>2011</risdate><spage>1</spage><epage>3</epage><pages>1-3</pages><issn>2380-632X</issn><eissn>2380-6338</eissn><isbn>9781457705038</isbn><isbn>1457705036</isbn><eisbn>145770501X</eisbn><eisbn>9781457705021</eisbn><eisbn>9781457705014</eisbn><eisbn>1457705028</eisbn><abstract>In this paper the effect of a vapor phase based silylation process on patterned test structures using ULK based ILD's was investigated. It was found that the resistance to capacitance (RC) behavior can be improved. This improvement was found to be scalable, meaning with decreasing metal pitch the RC improvement increases. The silylation process provides in addition a decrease of the leakage current and was found to have adequate defectivity. As the process is feasible for production and the improvement of the electrical properties increases with smaller feature size, it can be assumed that extra costs of the restoration process will be paid out for future technology nodes, if ULK as an ILD is used.</abstract><pub>IEEE</pub><doi>10.1109/IITC.2011.5940329</doi><tpages>3</tpages></addata></record> |
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subjects | Carbon Chemicals Maintenance engineering Metals Plasmas Surface treatment |
title | Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-13T14%3A41%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Electrical%20property%20improvements%20of%20ultra%20low-k%20ILD%20using%20a%20silylation%20process%20feasible%20for%20process%20integration&rft.btitle=2011%20IEEE%20International%20Interconnect%20Technology%20Conference&rft.au=Thomas,%20O.&rft.date=2011-05&rft.spage=1&rft.epage=3&rft.pages=1-3&rft.issn=2380-632X&rft.eissn=2380-6338&rft.isbn=9781457705038&rft.isbn_list=1457705036&rft_id=info:doi/10.1109/IITC.2011.5940329&rft_dat=%3Cieee_6IE%3E5940329%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=145770501X&rft.eisbn_list=9781457705021&rft.eisbn_list=9781457705014&rft.eisbn_list=1457705028&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5940329&rfr_iscdi=true |