Advanced floating gate CD uniformity control in the 75nm node NOR flash memory

This paper describes the advanced control technology of critical dimension uniformity (CDU) by flash gate stack etch process. We have investigated the effective way of utilizing Tri-layer approach, which not only reduces the influence of topology step-height but also improves the range of ECD within...

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Hauptverfasser:	Sheng-Yuan Chang, Yu-Chung Chen, An Chyi Wei, Hong-Ji Lee, Nan-Tzu Lian, Tahone Yang, Kuang-Chao Chen, Chih-Yuan Lu
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Chemistry Critical dimension uniformity (CDU) Etching flash gate stack etch Flash memory Logic gates Plasmas Polymers Tri-layer approach
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creator	Sheng-Yuan Chang Yu-Chung Chen An Chyi Wei Hong-Ji Lee Nan-Tzu Lian Tahone Yang Kuang-Chao Chen Chih-Yuan Lu
description	This paper describes the advanced control technology of critical dimension uniformity (CDU) by flash gate stack etch process. We have investigated the effective way of utilizing Tri-layer approach, which not only reduces the influence of topology step-height but also improves the range of ECD within die from 17.6nm to 4.9nm. Moreover, the influence of Etcher design on ECD variation becomes larger as the cell transistor size becomes smaller. The etch chamber effect is minimized by developing CF 4 /CHF 3 /N 2 plasma at 15mTorr pressure that provides better ECD uniformity within wafer.
doi_str_mv	10.1109/ASMC.2011.5898191
format	Conference Proceeding
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subjects	Chemistry Critical dimension uniformity (CDU) Etching flash gate stack etch Flash memory Logic gates Plasmas Polymers Tri-layer approach
title	Advanced floating gate CD uniformity control in the 75nm node NOR flash memory
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