A result forwarding mechanism for asynchronous pipelined systems

Modern, fast microprocessors are deeply pipelined to enhance their performance. Thus they cannot afford to wait for each instruction to complete before starting the next. When inter-instruction dependencies are encountered it is essential that data are forwarded from their point of production to whe...

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Bibliographische Detailangaben

Hauptverfasser:	Gilbert, D.A., Garside, J.D.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computer science Delay Electronic switching systems Hardware Microprocessors Out of order Production Registers Synchronization Writing
Online-Zugang:	Volltext bestellen
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