Supply-Voltage Scaling Close to the Fundamental Limit Under Process Variations in Nanometer Technologies
The fundamental limit on the minimum allowable supply voltage of a complementary metal-oxide-semiconductor (CMOS) logic gate for binary signal discrimination is V dd, min ≅ 2( ln 2) kT / q . With the theoretical analysis of our proposed circuit technique, we demonstrate an ultralow-voltage operation...
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| Veröffentlicht in: | IEEE transactions on electron devices 2011-08, Vol.58 (8), p.2808-2813 |
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| creator | HWANG, Myeong-Eun |
| description | The fundamental limit on the minimum allowable supply voltage of a complementary metal-oxide-semiconductor (CMOS) logic gate for binary signal discrimination is V dd, min ≅ 2( ln 2) kT / q . With the theoretical analysis of our proposed circuit technique, we demonstrate an ultralow-voltage operation with two 1000-stage inverter chains fabricated in 130- and 65-nm technologies, which can work all the way down to a supply voltage of 50 and 60 mV (with output swings of 42 and 43 mV), respectively, and are close to the fundamental limit of logic operation. For the first time, we present a measured minimum dynamic-switching energy of 21.3 aJ/cycle. This is accomplished by modulating the effective β-ratio to balance the p-channel and n-channel MOS transistors in strength, enabling the operation of standard CMOS logic at ultralow voltages. We also discuss 41-stage ring oscillators, which clearly show the existence of different optimal β-ratios in different regions of operation in terms of performance and robustness under process variations. |
| doi_str_mv | 10.1109/TED.2011.2151257 |
| format | Article |
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With the theoretical analysis of our proposed circuit technique, we demonstrate an ultralow-voltage operation with two 1000-stage inverter chains fabricated in 130- and 65-nm technologies, which can work all the way down to a supply voltage of 50 and 60 mV (with output swings of 42 and 43 mV), respectively, and are close to the fundamental limit of logic operation. For the first time, we present a measured minimum dynamic-switching energy of 21.3 aJ/cycle. This is accomplished by modulating the effective β-ratio to balance the p-channel and n-channel MOS transistors in strength, enabling the operation of standard CMOS logic at ultralow voltages. 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Passive components, printed wiring boards, connectics ; Electronics ; Exact sciences and technology ; fundamental limit ; Integrated circuits ; Inverters ; Logic ; minimum supply voltage ; MOSFETs ; Noise ; noise margin ; Oscillators ; Robustness ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; subthreshold logic ; Swing ; Threshold voltage ; Transistors ; Voltage ; Voltage control</subject><ispartof>IEEE transactions on electron devices, 2011-08, Vol.58 (8), p.2808-2813</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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With the theoretical analysis of our proposed circuit technique, we demonstrate an ultralow-voltage operation with two 1000-stage inverter chains fabricated in 130- and 65-nm technologies, which can work all the way down to a supply voltage of 50 and 60 mV (with output swings of 42 and 43 mV), respectively, and are close to the fundamental limit of logic operation. For the first time, we present a measured minimum dynamic-switching energy of 21.3 aJ/cycle. This is accomplished by modulating the effective β-ratio to balance the p-channel and n-channel MOS transistors in strength, enabling the operation of standard CMOS logic at ultralow voltages. We also discuss 41-stage ring oscillators, which clearly show the existence of different optimal β-ratios in different regions of operation in terms of performance and robustness under process variations.</description><subject>Applied sciences</subject><subject>beta -ratio</subject><subject>Circuit properties</subject><subject>CMOS</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Digital circuits</subject><subject>Dynamic voltage scaling (DVS)</subject><subject>Electric potential</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>fundamental limit</subject><subject>Integrated circuits</subject><subject>Inverters</subject><subject>Logic</subject><subject>minimum supply voltage</subject><subject>MOSFETs</subject><subject>Noise</subject><subject>noise margin</subject><subject>Oscillators</subject><subject>Robustness</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>subthreshold logic</subject><subject>Swing</subject><subject>Threshold voltage</subject><subject>Transistors</subject><subject>Voltage</subject><subject>Voltage control</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkEGLFDEQRoMoOK7eBS9BEE89ppJOJznKuKvCoMLO7jVk0umZLOlkTNKH_fdmmWEPUoei-F4VxUPoPZA1AFFfdtff1pQArClwoFy8QCvgXHRq6IeXaEUIyE4xyV6jN6U8tHHoe7pCx9vldAqP3X0K1RwcvrUm-HjAm5CKwzXhenT4ZomjmV2sJuCtn33Fd3F0Gf_JybpS8L3J3lSfYsE-4l8mptnVlu-cPcYU0sG78ha9mkwo7t2lX6G7m-vd5ke3_f395-brtrM9yNrRkUjmQI1iNFzsCQhmBBWwB6CUsVEpPlE-KQ7c8klIaYUUg9pTUKqXw55doc_nu6ec_i6uVD37Yl0IJrq0FK0aCK14Iz_-Rz6kJcf2nJZCEUYYFw0iZ8jmVEp2kz5lP5v8qIHoJ_G6iddP4vVFfFv5dLlrSrM5ZROtL897tO-BS9437sOZ886555gLMQyCsH_qzIpn</recordid><startdate>20110801</startdate><enddate>20110801</enddate><creator>HWANG, Myeong-Eun</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20110801</creationdate><title>Supply-Voltage Scaling Close to the Fundamental Limit Under Process Variations in Nanometer Technologies</title><author>HWANG, Myeong-Eun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c418t-2d083e19d7da57b0173a7271b112233d995f25f9515c5f788c78769b2199486b3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Applied sciences</topic><topic>beta -ratio</topic><topic>Circuit properties</topic><topic>CMOS</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Digital circuits</topic><topic>Dynamic voltage scaling (DVS)</topic><topic>Electric potential</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>fundamental limit</topic><topic>Integrated circuits</topic><topic>Inverters</topic><topic>Logic</topic><topic>minimum supply voltage</topic><topic>MOSFETs</topic><topic>Noise</topic><topic>noise margin</topic><topic>Oscillators</topic><topic>Robustness</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>subthreshold logic</topic><topic>Swing</topic><topic>Threshold voltage</topic><topic>Transistors</topic><topic>Voltage</topic><topic>Voltage control</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>HWANG, Myeong-Eun</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HWANG, Myeong-Eun</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Supply-Voltage Scaling Close to the Fundamental Limit Under Process Variations in Nanometer Technologies</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2011-08-01</date><risdate>2011</risdate><volume>58</volume><issue>8</issue><spage>2808</spage><epage>2813</epage><pages>2808-2813</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The fundamental limit on the minimum allowable supply voltage of a complementary metal-oxide-semiconductor (CMOS) logic gate for binary signal discrimination is V dd, min ≅ 2( ln 2) kT / q . With the theoretical analysis of our proposed circuit technique, we demonstrate an ultralow-voltage operation with two 1000-stage inverter chains fabricated in 130- and 65-nm technologies, which can work all the way down to a supply voltage of 50 and 60 mV (with output swings of 42 and 43 mV), respectively, and are close to the fundamental limit of logic operation. For the first time, we present a measured minimum dynamic-switching energy of 21.3 aJ/cycle. This is accomplished by modulating the effective β-ratio to balance the p-channel and n-channel MOS transistors in strength, enabling the operation of standard CMOS logic at ultralow voltages. We also discuss 41-stage ring oscillators, which clearly show the existence of different optimal β-ratios in different regions of operation in terms of performance and robustness under process variations.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2011.2151257</doi><tpages>6</tpages></addata></record> |
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| subjects | Applied sciences beta -ratio Circuit properties CMOS Design. Technologies. Operation analysis. Testing Devices Digital circuits Dynamic voltage scaling (DVS) Electric potential Electric, optical and optoelectronic circuits Electronic circuits Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology fundamental limit Integrated circuits Inverters Logic minimum supply voltage MOSFETs Noise noise margin Oscillators Robustness Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices subthreshold logic Swing Threshold voltage Transistors Voltage Voltage control |
| title | Supply-Voltage Scaling Close to the Fundamental Limit Under Process Variations in Nanometer Technologies |
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