Clock-gated and low-power standard cell library for ISFET Two-Point Calibration processor chip

This paper presents a novel clock gate cell that employs header and footer devices to isolate the transistor connected to clock signal. This new clock gate is called Low Internal Power Clock Gate (LIPCG), and saves power up to 81.77% over conventional clock gate during sleep operation. Moreover, thi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Wen-Yaw Chung, Jian-Ping Chang, Cruz, Febus Reidj G
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Calibration Clock gating Clocks ion sensitive field effect transistor ISFET Libraries Logic gates low power standard cells Power demand Process control Transistors two point calibration
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