A Wireless Network-on-Chip Design for Multicore Platforms

Aggressive scaling of transistors allows integration of hundreds of processors on a chip. However, on-chip interconnects carrying signals between different blocks will be the bottleneck for system performance and reliability. To tackle this problem, we developed an on-chip communication infrastructu...

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Bibliographische Detailangaben
Hauptverfasser: Chifeng Wang, Wen-Hsiang Hu, Bagherzadeh, N
Format: Tagungsbericht
Sprache:eng
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