A chargepump with enhanced current matching and reduced clock-feedthrough in wireless sensor nodes
Today, most of the locating systems are based on phase-locked loop (PLL) architectures for synthesizers. The synthesizer as a key element for location accuracy needs a chargepump with an exact current matching for improved phase noise performance. Especially in indoor scenarios, where sensor nodes m...
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creator | Jung, M Ferizi, A Weigel, R |
description | Today, most of the locating systems are based on phase-locked loop (PLL) architectures for synthesizers. The synthesizer as a key element for location accuracy needs a chargepump with an exact current matching for improved phase noise performance. Especially in indoor scenarios, where sensor nodes must reach a precision below a few centimeters, the fidelity of the synthesizer system is important. This paper addresses the design of a chargepump with enhanced current matching and reduced clock-feedthrough in a FMCW based sensor node. The difference between a conventional chargepump design and the enhanced design is presented and compared to show the current matching improvement and clock-feedthrough reduction. The different designs were manufactured in a 0.13μm CMOS process by IBM. They are running in a PLL with 128MHz reference frequency and have an output current of 100μA with a total power consumption of 1mW for the chargepump with phase-frequency detector (PFD). |
format | Conference Proceeding |
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The synthesizer as a key element for location accuracy needs a chargepump with an exact current matching for improved phase noise performance. Especially in indoor scenarios, where sensor nodes must reach a precision below a few centimeters, the fidelity of the synthesizer system is important. This paper addresses the design of a chargepump with enhanced current matching and reduced clock-feedthrough in a FMCW based sensor node. The difference between a conventional chargepump design and the enhanced design is presented and compared to show the current matching improvement and clock-feedthrough reduction. The different designs were manufactured in a 0.13μm CMOS process by IBM. They are running in a PLL with 128MHz reference frequency and have an output current of 100μA with a total power consumption of 1mW for the chargepump with phase-frequency detector (PFD).</description><identifier>ISSN: 2165-4727</identifier><identifier>ISBN: 9781424475902</identifier><identifier>ISBN: 1424475902</identifier><identifier>EISSN: 2165-4743</identifier><identifier>EISBN: 9781902339222</identifier><identifier>EISBN: 9784902339215</identifier><identifier>EISBN: 4902339218</identifier><language>eng</language><publisher>IEEE</publisher><subject>charge injection ; charge pump ; Clocks ; CMOS analog integrated circuits ; Phase frequency detector ; phase locked loop ; Phase locked loops ; Phase noise ; Sensor nodes ; Transconductance ; Transistors ; Wireless communication ; Wireless sensor networks</subject><ispartof>2010 Asia-Pacific Microwave Conference, 2010, p.2291-2294</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5728318$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,777,781,786,787,2052,54901</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5728318$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Jung, M</creatorcontrib><creatorcontrib>Ferizi, A</creatorcontrib><creatorcontrib>Weigel, R</creatorcontrib><title>A chargepump with enhanced current matching and reduced clock-feedthrough in wireless sensor nodes</title><title>2010 Asia-Pacific Microwave Conference</title><addtitle>APMC</addtitle><description>Today, most of the locating systems are based on phase-locked loop (PLL) architectures for synthesizers. The synthesizer as a key element for location accuracy needs a chargepump with an exact current matching for improved phase noise performance. Especially in indoor scenarios, where sensor nodes must reach a precision below a few centimeters, the fidelity of the synthesizer system is important. This paper addresses the design of a chargepump with enhanced current matching and reduced clock-feedthrough in a FMCW based sensor node. The difference between a conventional chargepump design and the enhanced design is presented and compared to show the current matching improvement and clock-feedthrough reduction. The different designs were manufactured in a 0.13μm CMOS process by IBM. They are running in a PLL with 128MHz reference frequency and have an output current of 100μA with a total power consumption of 1mW for the chargepump with phase-frequency detector (PFD).</description><subject>charge injection</subject><subject>charge pump</subject><subject>Clocks</subject><subject>CMOS analog integrated circuits</subject><subject>Phase frequency detector</subject><subject>phase locked loop</subject><subject>Phase locked loops</subject><subject>Phase noise</subject><subject>Sensor nodes</subject><subject>Transconductance</subject><subject>Transistors</subject><subject>Wireless communication</subject><subject>Wireless sensor networks</subject><issn>2165-4727</issn><issn>2165-4743</issn><isbn>9781424475902</isbn><isbn>1424475902</isbn><isbn>9781902339222</isbn><isbn>9784902339215</isbn><isbn>4902339218</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNp9y0FOwzAQhWEXikQFOUE3c4FI9tjBybJCIA7AvnLtaWxInGicCHF7KkAsWb3F9_6NqDrbqk6i1h0iXokdqoemNtbo6x8zaIxtLo_tn6G9FVUpb1JKlFIpo3fidAAfHfc0r-MMH2mJQDm67CmAX5kpLzC6xceUe3A5AFNYv3GY_Ht9JgpL5GntI6R86ZkGKgUK5TIx5ClQuRc3ZzcUqn73Tuyfn14fX-pERMeZ0-j489hYbLVq9f_6Bc3sR5g</recordid><startdate>201012</startdate><enddate>201012</enddate><creator>Jung, M</creator><creator>Ferizi, A</creator><creator>Weigel, R</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201012</creationdate><title>A chargepump with enhanced current matching and reduced clock-feedthrough in wireless sensor nodes</title><author>Jung, M ; Ferizi, A ; Weigel, R</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_57283183</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>charge injection</topic><topic>charge pump</topic><topic>Clocks</topic><topic>CMOS analog integrated circuits</topic><topic>Phase frequency detector</topic><topic>phase locked loop</topic><topic>Phase locked loops</topic><topic>Phase noise</topic><topic>Sensor nodes</topic><topic>Transconductance</topic><topic>Transistors</topic><topic>Wireless communication</topic><topic>Wireless sensor networks</topic><toplevel>online_resources</toplevel><creatorcontrib>Jung, M</creatorcontrib><creatorcontrib>Ferizi, A</creatorcontrib><creatorcontrib>Weigel, R</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore (Online service)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jung, M</au><au>Ferizi, A</au><au>Weigel, R</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A chargepump with enhanced current matching and reduced clock-feedthrough in wireless sensor nodes</atitle><btitle>2010 Asia-Pacific Microwave Conference</btitle><stitle>APMC</stitle><date>2010-12</date><risdate>2010</risdate><spage>2291</spage><epage>2294</epage><pages>2291-2294</pages><issn>2165-4727</issn><eissn>2165-4743</eissn><isbn>9781424475902</isbn><isbn>1424475902</isbn><eisbn>9781902339222</eisbn><eisbn>9784902339215</eisbn><eisbn>4902339218</eisbn><abstract>Today, most of the locating systems are based on phase-locked loop (PLL) architectures for synthesizers. The synthesizer as a key element for location accuracy needs a chargepump with an exact current matching for improved phase noise performance. Especially in indoor scenarios, where sensor nodes must reach a precision below a few centimeters, the fidelity of the synthesizer system is important. This paper addresses the design of a chargepump with enhanced current matching and reduced clock-feedthrough in a FMCW based sensor node. The difference between a conventional chargepump design and the enhanced design is presented and compared to show the current matching improvement and clock-feedthrough reduction. The different designs were manufactured in a 0.13μm CMOS process by IBM. They are running in a PLL with 128MHz reference frequency and have an output current of 100μA with a total power consumption of 1mW for the chargepump with phase-frequency detector (PFD).</abstract><pub>IEEE</pub></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | charge injection charge pump Clocks CMOS analog integrated circuits Phase frequency detector phase locked loop Phase locked loops Phase noise Sensor nodes Transconductance Transistors Wireless communication Wireless sensor networks |
title | A chargepump with enhanced current matching and reduced clock-feedthrough in wireless sensor nodes |
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