Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit

A 1.2V 1.95mW low-power Programmable Gain Amplifier (PGA) with high-input range is proposed and implemented in a 90nm CMOS process. The PGA is formed by three stages with a bandwidth of 20MHz for a 2pF capacitive load. Gain is in the range between 0 and 72dB in steps of 6dB. The stage core consists...

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Bibliographische Detailangaben

Hauptverfasser:	Ginés, A J, Doldán, R, Rueda, A, Peralias, E
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS integrated circuits Variable speed drives
Online-Zugang:	Volltext bestellen
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