Analog Implementation of a Novel Resistive-Type Sigmoidal Neuron
An important part of any hardware implementation of artificial neural networks (ANNs) is realization of the activation function which serves as the output stage of each layer. In this work, a new NMOS/PMOS design is proposed for realizing the sigmoid function as the activation function. Transistors...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2012-04, Vol.20 (4), p.750-754 |
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| container_title | IEEE transactions on very large scale integration (VLSI) systems |
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| creator | Khodabandehloo, G. Mirhassani, M. Ahmadi, M. |
| description | An important part of any hardware implementation of artificial neural networks (ANNs) is realization of the activation function which serves as the output stage of each layer. In this work, a new NMOS/PMOS design is proposed for realizing the sigmoid function as the activation function. Transistors in the proposed neuron are biased using only one biasing voltage. By operating in both triode and saturation regions, the proposed neuron can provide an accurate approximation of the sigmoid function. The neuron circuit is designed and laid out in 90-nm CMOS technology. The proposed neuron can be potentially used in implementation of both analog and hybrid ANNs. |
| doi_str_mv | 10.1109/TVLSI.2011.2109404 |
| format | Article |
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In this work, a new NMOS/PMOS design is proposed for realizing the sigmoid function as the activation function. Transistors in the proposed neuron are biased using only one biasing voltage. By operating in both triode and saturation regions, the proposed neuron can provide an accurate approximation of the sigmoid function. The neuron circuit is designed and laid out in 90-nm CMOS technology. The proposed neuron can be potentially used in implementation of both analog and hybrid ANNs.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2011.2109404</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Activation ; Activation function ; analog neuron ; Applied sciences ; Approximation ; Approximation methods ; Artificial neural networks ; CMOS ; Design. Technologies. Operation analysis. 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In this work, a new NMOS/PMOS design is proposed for realizing the sigmoid function as the activation function. Transistors in the proposed neuron are biased using only one biasing voltage. By operating in both triode and saturation regions, the proposed neuron can provide an accurate approximation of the sigmoid function. The neuron circuit is designed and laid out in 90-nm CMOS technology. The proposed neuron can be potentially used in implementation of both analog and hybrid ANNs.</description><subject>Activation</subject><subject>Activation function</subject><subject>analog neuron</subject><subject>Applied sciences</subject><subject>Approximation</subject><subject>Approximation methods</subject><subject>Artificial neural networks</subject><subject>CMOS</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic tubes, masers</subject><subject>Electronics</subject><subject>Equations</subject><subject>Exact sciences and technology</subject><subject>Hardware</subject><subject>Integrated circuits</subject><subject>Mathematical model</subject><subject>Neural networks</subject><subject>Neurons</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>sigmoid function</subject><subject>sigmoidal neuron</subject><subject>Transistors</subject><subject>Triodes</subject><subject>Very large scale integration</subject><subject>Voltage</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkF1LwzAUhoMoOKd_QG-KIHjTmTRN0twpw4_BmOCmtyVtT0dG2sykHezfm32wC3OTHM57nkMehG4JHhGC5dPiZzqfjBJMyCgJdYrTMzQgjIlYhnMe3pjTOAu9S3Tl_QpjkqYSD9DzS6uMXUaTZm2ggbZTnbZtZOtIRTO7ARN9gde-0xuIF9s1RHO9bKyulIlm0DvbXqOLWhkPN8d7iL7fXhfjj3j6-T4Zv0zjkjLRxVxgShRRmJdhdwkJKwrO00yoIst4BoqFsqoKUXNaESwSmdQpoSKtK1xwjOkQPR64a2d_e_Bd3mhfgjGqBdv7nGAiOaNM0hC9_xdd2d6Ff_pcJpJQTve85BAqnfXeQZ2vnW6U2wZSvnOa753mO6f50WkYejiSlS-VqZ1qS-1PkwkTLMB5yN0dchoATm0miAza6R9_NH2V</recordid><startdate>20120401</startdate><enddate>20120401</enddate><creator>Khodabandehloo, G.</creator><creator>Mirhassani, M.</creator><creator>Ahmadi, M.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Solid state devices</topic><topic>sigmoid function</topic><topic>sigmoidal neuron</topic><topic>Transistors</topic><topic>Triodes</topic><topic>Very large scale integration</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Khodabandehloo, G.</creatorcontrib><creatorcontrib>Mirhassani, M.</creatorcontrib><creatorcontrib>Ahmadi, M.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Khodabandehloo, G.</au><au>Mirhassani, M.</au><au>Ahmadi, M.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Analog Implementation of a Novel Resistive-Type Sigmoidal Neuron</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2012-04-01</date><risdate>2012</risdate><volume>20</volume><issue>4</issue><spage>750</spage><epage>754</epage><pages>750-754</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>An important part of any hardware implementation of artificial neural networks (ANNs) is realization of the activation function which serves as the output stage of each layer. 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| subjects | Activation Activation function analog neuron Applied sciences Approximation Approximation methods Artificial neural networks CMOS Design. Technologies. Operation analysis. Testing Electric, optical and optoelectronic circuits Electronic tubes, masers Electronics Equations Exact sciences and technology Hardware Integrated circuits Mathematical model Neural networks Neurons Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices sigmoid function sigmoidal neuron Transistors Triodes Very large scale integration Voltage |
| title | Analog Implementation of a Novel Resistive-Type Sigmoidal Neuron |
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