A Robust and Reconfigurable Multi-mode Power Gating Architecture
Multi-threshold CMOS is a very effective technique for reducing standby leakage power during long periods of inactivity. Recently, a power-gating scheme was presented to support multiple power-off modes and reduce the leakage power during short periods of inactivity. However, this scheme suffers fro...
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| creator | Zhang, Z Kavousianos, X Chakrabarty, K Tsiatouhas, Y |
| description | Multi-threshold CMOS is a very effective technique for reducing standby leakage power during long periods of inactivity. Recently, a power-gating scheme was presented to support multiple power-off modes and reduce the leakage power during short periods of inactivity. However, this scheme suffers from high sensitivity to process variations, which impedes manufacturability and also limits its applicability to at most two intermediate power-off modes. We propose a new power-gating technique that is tolerant to process variations and scalable to more than two intermediate power-off modes. In addition, the proposed design requires minimum design effort and offers greater power reduction and smaller area cost than the previous method. Analysis and extensive simulation results demonstrate the effectiveness of the proposed design. |
| doi_str_mv | 10.1109/VLSID.2011.29 |
| format | Conference Proceeding |
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Analysis and extensive simulation results demonstrate the effectiveness of the proposed design.</description><subject>Generators</subject><subject>Leakage current</subject><subject>Logic gates</subject><subject>Mathematical model</subject><subject>Power demand</subject><subject>Threshold voltage</subject><subject>Transistors</subject><issn>1063-9667</issn><issn>2380-6923</issn><isbn>1612843271</isbn><isbn>9781612843278</isbn><isbn>9780769543482</isbn><isbn>0769543480</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzstOAjEUgOF6SwRk6cpNX2DwnJ6ZXnYSUCTBaJC4JW3nDNYAY-YS49troqt_9-UX4hphggju9m31upxPFCBOlDsRY2csGO2KnHKrTsVAkYVMO0VnYogalc1JGTwXAwRNmdPaXIph234AgC3ADMTdVK7r0Led9MdSrjnWxyrt-saHPcunft-l7FCXLF_qL27kwnfpuJPTJr6njmPXN3wlLiq_b3n835HYPNxvZo_Z6nmxnE1XWXLQZYoiFc5DlauYK0clBVNWkFfokALpAIZKrErwDn-HHUX0nskEG1lxiDQSN39sYubtZ5MOvvneFgatxYJ-AOSxTD0</recordid><startdate>201101</startdate><enddate>201101</enddate><creator>Zhang, Z</creator><creator>Kavousianos, X</creator><creator>Chakrabarty, K</creator><creator>Tsiatouhas, Y</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201101</creationdate><title>A Robust and Reconfigurable Multi-mode Power Gating Architecture</title><author>Zhang, Z ; Kavousianos, X ; Chakrabarty, K ; Tsiatouhas, Y</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-23c359a0f42c4293d3b7df04f1913b36b073d1fd0a9127193c1aae37b8ce2ebc3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Generators</topic><topic>Leakage current</topic><topic>Logic gates</topic><topic>Mathematical model</topic><topic>Power demand</topic><topic>Threshold voltage</topic><topic>Transistors</topic><toplevel>online_resources</toplevel><creatorcontrib>Zhang, Z</creatorcontrib><creatorcontrib>Kavousianos, X</creatorcontrib><creatorcontrib>Chakrabarty, K</creatorcontrib><creatorcontrib>Tsiatouhas, Y</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhang, Z</au><au>Kavousianos, X</au><au>Chakrabarty, K</au><au>Tsiatouhas, Y</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A Robust and Reconfigurable Multi-mode Power Gating Architecture</atitle><btitle>2011 24th Internatioal Conference on VLSI Design</btitle><stitle>VLSI Design</stitle><date>2011-01</date><risdate>2011</risdate><spage>280</spage><epage>285</epage><pages>280-285</pages><issn>1063-9667</issn><eissn>2380-6923</eissn><isbn>1612843271</isbn><isbn>9781612843278</isbn><eisbn>9780769543482</eisbn><eisbn>0769543480</eisbn><abstract>Multi-threshold CMOS is a very effective technique for reducing standby leakage power during long periods of inactivity. Recently, a power-gating scheme was presented to support multiple power-off modes and reduce the leakage power during short periods of inactivity. However, this scheme suffers from high sensitivity to process variations, which impedes manufacturability and also limits its applicability to at most two intermediate power-off modes. We propose a new power-gating technique that is tolerant to process variations and scalable to more than two intermediate power-off modes. In addition, the proposed design requires minimum design effort and offers greater power reduction and smaller area cost than the previous method. Analysis and extensive simulation results demonstrate the effectiveness of the proposed design.</abstract><pub>IEEE</pub><doi>10.1109/VLSID.2011.29</doi><tpages>6</tpages></addata></record> |
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| issn | 1063-9667 2380-6923 |
| language | eng |
| recordid | cdi_ieee_primary_5718815 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Generators Leakage current Logic gates Mathematical model Power demand Threshold voltage Transistors |
| title | A Robust and Reconfigurable Multi-mode Power Gating Architecture |
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