0.6V voltage doubler and clocked comparator for correlation-based impulse radio UWB receiver in 65nm CMOS

This paper presents a 0.6-V voltage doubler and a 0.6-V clocked comparator in 65 nm CMOS. For the multi-phase sampling application, such as charge-domain correlator for impulse UWB receivers or analog-to-digital converter, the proposed voltage doubler can reduce the power consumption and the chip ar...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Lechang Liu, Sakurai, Takayasu, Takamiya, Makoto
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Clocks CMOS integrated circuits Correlators Generators Power supplies Receivers Synchronization
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