A 58-63.6GHz quadrature PLL frequency synthesizer in 65nm CMOS

This paper proposes a 60 GHz quadrature PLL frequency synthesizer that has a tuning range capable of covering the whole band specified by the IEEE802.15.3c with exceptional phase noise. The synthesizer is constructed using a 20GHz PLL that is coupled with a frequency tripler to generate the 60 GHz s...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Musa, Ahmed, Murakami, Rui, Sato, Takahiro, Chiavipas, Win, Okada, Kenichi, Matsuzawa, Akira
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS integrated circuits Frequency synthesizers Phase locked loops Phase noise Synthesizers Tuning Voltage-controlled oscillators
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!